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Research Article
Open Access

oa

Design of Synthesizable, Retimed Digital Filters Using FPGA Based Path Solvers with MCM Approach: Comparison and CAD Tool
Deepa Yagain, A. Vijaya Krishna,

First published: 24 July 2014
Research Article
Open Access

oa

Optimization of Fractional-N-PLL Frequency Synthesizer for Power Effective Design
Sahar Arshad, Muhammad Ismail, Usman Ahmad, Anees ul Husnain, Qaiser Ijaz,

First published: 23 July 2014

Collections: Advanced VLSI Architecture Design for Emerging Digital Systems
Research Article
Open Access

oa

Parallel Jacobi EVD Methods on Integrated Circuits
Chi-Chia Sun, Jürgen Götze, Gene Eu Jan,

First published: 20 July 2014
Research Article
Open Access

oa

Performance Analysis of Modified Drain Gating Techniques for Low Power and High Speed Arithmetic Circuits
Shikha Panwar, Mayuresh Piske, Aatreya Vivek Madgula,

First published: 15 July 2014

Collections: Advanced VLSI Architecture Design for Emerging Digital Systems
Review Article
Open Access

oa

Gate-Level Circuit Reliability Analysis: A Survey
Ran Xiao, Chunhong Chen,

First published: 10 July 2014

Collections: Advanced VLSI Architecture Design for Emerging Digital Systems
Research Article
Open Access

oa

High Throughput Pseudorandom Number Generator Based on Variable Argument Unified Hyperchaos
Kaiyu Wang, Qingxin Yan, Shihua Yu, Xianwei Qi, Yudi Zhou, Zhenan Tang,

First published: 07 July 2014
Research Article
Open Access

oa

Novel Receiver Architecture for LTE-A Downlink Physical Control Format Indicator Channel with Diversity
S. Syed Ameer Abbas, S. J. Thiruvengadam, S. Susithra,

First published: 05 June 2014
Review Article
Open Access

oa

VLSI Architectures for Image Interpolation: A Survey
C. John Moses, D. Selvathi, V. M. Anne Sophia,

First published: 19 May 2014
Research Article
Open Access

oa

Radix-2^α/4^β Building Blocks for Efficient VLSI’s Higher Radices Butterflies Implementation
Marwan A. Jaber, Daniel Massicotte,

First published: 13 May 2014
Research Article
Open Access

oa

Low-Area Wallace Multiplier
Shahzad Asif, Yinan Kong,

First published: 12 May 2014

Collections: Advanced VLSI Architecture Design for Emerging Digital Systems
Research Article
Open Access

oa

Efficient Hardware Trojan Detection with Differential Cascade Voltage Switch Logic
Wafi Danesh, Jaya Dofe, Qiaoyan Yu,

First published: 11 May 2014

Collections: Advanced VLSI Architecture Design for Emerging Digital Systems
Research Article
Open Access

oa

On-Chip Power Minimization Using Serialization-Widening with Frequent Value Encoding
Khader Mohammad, Ahsan Kabeer, Tarek Taha,

First published: 06 May 2014

Collections: Advanced VLSI Architecture Design for Emerging Digital Systems
Research Article
Open Access

oa

A Self-Reconfigurable Platform for the Implementation of 2D Filterbanks with Real and Complex-Valued Inputs, Outputs, and Filter Coefficients
Daniel Llamocca, Marios Pattichis,

First published: 04 May 2014
Editorial
Open Access

oa

New Algorithmic Techniques for Complex EDA Problems
Shantanu Dutt, Dinesh Mehta, Gi-Joon Nam,

First published: 27 April 2014

Collections: New Algorithmic Techniques for Complex EDA Problems
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Research Article
Open Access

oa

Design of Finite Word Length Linear-Phase FIR Filters in the Logarithmic Number System Domain
Syed Asad Alam, Oscar Gustafsson,

First published: 09 April 2014
Editorial
Open Access

oa

Advanced VLSI Design Methodologies for Emerging Industrial Multimedia and Communication Applications
Yeong-Kang Lai, Yeong-Lin Lai, Thomas Schumann,

First published: 18 March 2014

Collections: Advanced VLSI Design Methodologies for Emerging Industrial Multimedia and Communication Applications
- Full text
- PDF
Research Article
Open Access

oa

A Low-Power Scalable Stream Compute Accelerator for General Matrix Multiply (GEMM)
Antony Savich, Shawki Areibi,

First published: 24 February 2014
Research Article
Open Access

oa

Improved Quantization Error Compensation Method for Fixed-Width Booth Multipliers
Xiaolong Ma, Jiangtao Xu, Guican Chen,

First published: 06 February 2014
Research Article
Open Access

oa

Meta-Algorithms for Scheduling a Chain of Coarse-Grained Tasks on an Array of Reconfigurable FPGAs
Dinesh P. Mehta, Carl Shetters, Donald W. Bouldin,

First published: 25 December 2013

Collections: New Algorithmic Techniques for Complex EDA Problems
Research Article
Open Access

oa

A Generic Three-Sided Rearrangeable Switching Network for Polygonal FPGA Design
Mao-Hsu Yen, Chu Yu, Horng-Ru Liao, Chin-Fa Hsieh,

First published: 11 December 2013

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VLSI Design

Filters

All VLSI Design Articles

oa

Design of Synthesizable, Retimed Digital Filters Using FPGA Based Path Solvers with MCM Approach: Comparison and CAD Tool

oa

Optimization of Fractional-N-PLL Frequency Synthesizer for Power Effective Design

oa

Parallel Jacobi EVD Methods on Integrated Circuits

oa

Performance Analysis of Modified Drain Gating Techniques for Low Power and High Speed Arithmetic Circuits

oa

Gate-Level Circuit Reliability Analysis: A Survey

oa

High Throughput Pseudorandom Number Generator Based on Variable Argument Unified Hyperchaos

oa

Novel Receiver Architecture for LTE-A Downlink Physical Control Format Indicator Channel with Diversity

oa

VLSI Architectures for Image Interpolation: A Survey

oa

Radix-2^α/4^β Building Blocks for Efficient VLSI’s Higher Radices Butterflies Implementation

oa

Low-Area Wallace Multiplier

oa

Efficient Hardware Trojan Detection with Differential Cascade Voltage Switch Logic

oa

On-Chip Power Minimization Using Serialization-Widening with Frequent Value Encoding

oa

A Self-Reconfigurable Platform for the Implementation of 2D Filterbanks with Real and Complex-Valued Inputs, Outputs, and Filter Coefficients

oa

New Algorithmic Techniques for Complex EDA Problems

oa

Design of Finite Word Length Linear-Phase FIR Filters in the Logarithmic Number System Domain

oa

Advanced VLSI Design Methodologies for Emerging Industrial Multimedia and Communication Applications

oa

A Low-Power Scalable Stream Compute Accelerator for General Matrix Multiply (GEMM)

oa

Improved Quantization Error Compensation Method for Fixed-Width Booth Multipliers

oa

Meta-Algorithms for Scheduling a Chain of Coarse-Grained Tasks on an Array of Reconfigurable FPGAs

oa

A Generic Three-Sided Rearrangeable Switching Network for Polygonal FPGA Design

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oa Design of Synthesizable, Retimed Digital Filters Using FPGA Based Path Solvers with MCM Approach: Comparison and CAD Tool

oa Optimization of Fractional-N-PLL Frequency Synthesizer for Power Effective Design

oa Parallel Jacobi EVD Methods on Integrated Circuits

oa Performance Analysis of Modified Drain Gating Techniques for Low Power and High Speed Arithmetic Circuits

oa Gate-Level Circuit Reliability Analysis: A Survey

oa High Throughput Pseudorandom Number Generator Based on Variable Argument Unified Hyperchaos

oa Novel Receiver Architecture for LTE-A Downlink Physical Control Format Indicator Channel with Diversity

oa VLSI Architectures for Image Interpolation: A Survey

oa Radix-2α/4β Building Blocks for Efficient VLSI’s Higher Radices Butterflies Implementation

oa Low-Area Wallace Multiplier

oa Efficient Hardware Trojan Detection with Differential Cascade Voltage Switch Logic

oa On-Chip Power Minimization Using Serialization-Widening with Frequent Value Encoding

oa A Self-Reconfigurable Platform for the Implementation of 2D Filterbanks with Real and Complex-Valued Inputs, Outputs, and Filter Coefficients

oa New Algorithmic Techniques for Complex EDA Problems

oa Design of Finite Word Length Linear-Phase FIR Filters in the Logarithmic Number System Domain

oa Advanced VLSI Design Methodologies for Emerging Industrial Multimedia and Communication Applications

oa A Low-Power Scalable Stream Compute Accelerator for General Matrix Multiply (GEMM)

oa Improved Quantization Error Compensation Method for Fixed-Width Booth Multipliers

oa Meta-Algorithms for Scheduling a Chain of Coarse-Grained Tasks on an Array of Reconfigurable FPGAs

oa A Generic Three-Sided Rearrangeable Switching Network for Polygonal FPGA Design

oa

Design of Synthesizable, Retimed Digital Filters Using FPGA Based Path Solvers with MCM Approach: Comparison and CAD Tool

oa

Optimization of Fractional-N-PLL Frequency Synthesizer for Power Effective Design

oa

Parallel Jacobi EVD Methods on Integrated Circuits

oa

Performance Analysis of Modified Drain Gating Techniques for Low Power and High Speed Arithmetic Circuits

oa

Gate-Level Circuit Reliability Analysis: A Survey

oa

High Throughput Pseudorandom Number Generator Based on Variable Argument Unified Hyperchaos

oa

Novel Receiver Architecture for LTE-A Downlink Physical Control Format Indicator Channel with Diversity

oa

VLSI Architectures for Image Interpolation: A Survey

oa

Radix-2^α/4^β Building Blocks for Efficient VLSI’s Higher Radices Butterflies Implementation

oa

Low-Area Wallace Multiplier

oa

Efficient Hardware Trojan Detection with Differential Cascade Voltage Switch Logic

oa

On-Chip Power Minimization Using Serialization-Widening with Frequent Value Encoding

oa

A Self-Reconfigurable Platform for the Implementation of 2D Filterbanks with Real and Complex-Valued Inputs, Outputs, and Filter Coefficients

oa

New Algorithmic Techniques for Complex EDA Problems

oa

Design of Finite Word Length Linear-Phase FIR Filters in the Logarithmic Number System Domain

oa

Advanced VLSI Design Methodologies for Emerging Industrial Multimedia and Communication Applications

oa

A Low-Power Scalable Stream Compute Accelerator for General Matrix Multiply (GEMM)

oa

Improved Quantization Error Compensation Method for Fixed-Width Booth Multipliers

oa

Meta-Algorithms for Scheduling a Chain of Coarse-Grained Tasks on an Array of Reconfigurable FPGAs

oa

A Generic Three-Sided Rearrangeable Switching Network for Polygonal FPGA Design