This paper presents a methodology for solving а dynamic electric circuit with nonlinear hysteretic inductor. Nonlinear and hysteretic behaviour of the magnetic core is considered by applying harmonics interpolation method (HIM), without the use of hysteresis model or equivalent circuit. The solution for electric current of the circuit is obtained by solving equations derived from Kirchhoff's laws through a series of successive iterations.

The proposed ultra-low-power low noise amplifier utilizes multiple g_m-boosting and self-forward body bias techniques, with certain transistors operating in weak inversion. Additionally, the Multi-Objective Inclined Planes System Optimization algorithm is employed to determine the optimal values of the circuit components, thereby achieving the best trade-off among the various performance parameters.

The theory of the transistor-based class-F⁻¹ rectifier with the input second harmonic component is explored. A broadband high-efficiency class-F⁻¹ rectifier (operating in 1.6–2.6 GHz) using a GaN transistor is realized. Measurements indicate a rectification efficiency of between 72.1% and 82.4% under the condition of R_dc = 67 Ω and P_in = 40 dBm.

This paper presents a low-power multibit delta–sigma modulator based on a passive and unattenuated summation scheme. The summation circuit achieves multiplication of the voltage signal carried on the summation capacitor through a bidirectional sampling technique, thereby compensating for the inherent attenuation caused by passive summation.

The proposed WPT system: (A) The circuit configuration; (B) The inverter waveforms. Green and red lines are overlapped with black and red lines, respectively, for $v_S$ and $i_2$. All lines are overlapped for $v_g$ and it; and (C) The receiver waveforms. Blue and red lines are overlapped with black and green lines, respectively, except $V_{\mathit{On}}$. All lines are overlapped for $V_{\mathit{On}}$.

The proposed CV-type WPT system based on CLC-N compensation eliminates bulky filter inductors and secondary side components, achieving a compact and lightweight design. Its ability to achieve approximate ZPA and ZVS operations, as well as CVO characteristics without complex closed-loop control, highlights its simple structure and excellent functional performance.

Battery lumped fractional-order hysteresis thermoelectric coupling model for the state of charge estimation adaptive to time-varying core temperature conditions.

In this paper, a broadband continuous class-B/J power amplifier based on a novel output matching network (OMN) is proposed, which is composed of a multiband harmonic control network (MHCN) and a fundamental matching network (FMN) utilizing a simplified real frequency technique (SRFT).

This article presents an adaptive bulk-driven feedforward (ABDFF) technique, which is implemented by two mirror transistors, M_PR1 and M_PR2, and two operational amplifier, OTA₁ and OTA₂, to track the load variations and generate an adaptive feedforward ripple at V_Y. The ripple is injected into the bulk of power transistor and the low dropout regulator (LDO) maintains a steady high power supply rejection (PSR) enhancement over a wide load range.

Based on voltage threshold memristor, a memristor associative memory circuit is constructed, and the whole process of acquisition, extinction, generalization, and differentiation of Pavlov associative memory experiment is realized. Compared with the traditional auditory Pavlov experiment, the visual learning mode is added, and the mutual inhibition between the two learning modes is explored. Compared with the traditional generalization and differentiation process, the process in this paper can be realized from every input signals.

This paper introduces a wide range DDS complete system and circuit designs for electrochemical impedance spectroscopy measurements. The proposed DDFS-based reconfigurable DAC excites the electrochemical sensor with a pure sin wave for impedance-measuring purposes. The designed DDS system achieves THD less than 0.05% with superior free dynamic range (SFDR) 66 dBc for low-frequency range and 0.08% with SFDR 62 dBc for high-frequency range.

The Schmitt-trigger-based 9 T SRAM cell achieves an excellent read stability result by using a one-sided Schmitt-trigger inverter via a single bitline (BL) layout. The standard AND gates are combined with Schmitt-trigger logic AND gates to improve noise tolerance while consuming less power and taking up less space. Instead of using a power-gating mechanism, this research focuses on modifying a power delay product (PDP) circuit to increase the cell's read-and-write operation efficiency. The modified decoupled sensing amplifier plays a major role in the access time and provides significant benefits in terms of read latency.

To optimize implementations for resource-constrained Internet of Things (IoT) devices, new, efficient circuit structures for key schedules and round functions of the Piccolo are proposed. Furthermore, three iterative architectures are presented, showing improved area and efficiency compared with existing designs, particularly enhancing the performance of Piccolo-80/128 against other block ciphers. In addition, the scalar architectures with the highest throughput compared with existing architectures are designed.

In this paper, we propose a lightweight image compression method (HICA-WT-NTT), which is based on NTT and WT to improve the compression ratio (CR), so as to reduce the transmission rate requirement for IoT devices. Simulation tests images with different qualities and CRs, and results show that the proposed method usually produces better CR as well as runtime performance than other tested methods, while all tested methods maintain almost the same recovered image quality or the same CR. Thus, the proposed method has adaptability to various IoT application scenarios.

In this paper, a three-phase LLC resonant converter with variable magnetizing inductance is proposed to extend the gain range; meanwhile, a two-stage control strategy of PFM and fixed-frequency magnetizing inductance modulation (MIM) is proposed.

Based on the moving average filter algorithm, this article investigated a simultaneous wireless power and data transfer system. The channel and misalignment characterization is analyzed in detail for DDQ style of magnetic coupling mechanism and LCC-S topology in this article.The communication system is still able to operate stably and reliably even when the coil is misaligned by 6 cm in the x-direction and y-direction, respectively.

Architecture of the novel battery-less RF-powered wireless voltage meter optimized to perform accurate voltage sensing from AC insulated wires of electric power lines and electric distribution systems.

In this paper, a single-phase AC-AC converter with continuous input current and without commutation problem is proposed. The output voltage regulation achieved using a single high-frequency switch eliminates the need for complementary switches, thereby resolving high-frequency commutation issues and obviating the necessity for snubber circuits and a safe commutation strategy. The proposed converter operates with a continuous input current, eliminating the need for a bulky LC filter. Low-frequency switches on the output side allow for step-changed frequency operation without encountering commutation problems. A straightforward and adaptable switching strategy generates the step-changed frequency at the output.

This paper introduces a new active snubber cell for DC-DC boost converters for the purpose of soft switching. It is validated using a prototype with a 500 W output power and at the 100 kHz switching frequency. Owing to the proposed snubber cell, the converter efficiency is achieved as 97.2%.

This paper analyses the grid-connected stability of an offshore wind power system fed via a power cable due to the stochastic variation of the cable impedance. The orthogonal polynomial method is used to analyse the stochastic stability of DFIG. At the same time, MC is used for verification.

Wide-band impedance models of VSG and CPL are established. The analysis results are verified through time-domain simulation. Finally, the impedance reshaping strategy for both VSG and CPL is proposed based on passivity theory to enhance the small-signal stability of the islanded microgrid.

The arc fault characteristics of certain loads lack significance, making it difficult to efficiently detect the line current characteristics. This research presents a novel approach for detecting arc faults using a combination of Principal Component Analysis and Random Forest based on voltage measurements. The experimental results demonstrated that the approach exhibits superior accuracy and a reduced false alarm rate.

A phase-shifted full bridge zeta DC-DC converter is proposed for charging 36 V Li-ion battery for EV applications. The modes of operation of the proposed converter is explained, and the simulated results of the different parameters of the system are shown. The values of the energy, current, and voltage of various active and passive components are obtained. The hardware prototype of the proposed converter is developed, and the plots of the waveforms of the different parameters are presented. The various samples of the phase shift are chosen, and the effect of the phase shift on the different parameters like voltage and the current of the converter is observed.

A bidirectional buck/boost DC/DC converter is used to utilize PV electric energy along with battery charge/discharge control.

A common single-phase IOBC topology is used as an example, the causes of inductance fluctuations are analyzed, and finite element analysis (FEM) of motor inductance with different types of motor is carried out. A recursive least squares (RLS)-based solution method is proposed, and its convergence is analyzed.

Initially, the main SSA models are obtained for fourth-order converters. The proposed method corrects the models by mathematical manipulations. Several modeling techniques can be applied. The model can be evaluated from the simulation and experimental results. In addition, proper control can be defined and tuned.

A novel method is proposed to improved the quality of output voltage waveform of three cells CHB-MLI with DC input values. Proposed method for eliminating duplicated values and ensuring that the magnitudes between successive levels remain consistently close to each other. Asymmetric DC sources generate optimum levels, 13 levels (0 to 0.04 s) and 9 levels (0.04 s to 0.08 s), for two sets of variable input DC voltages.

1. For the first time, the current study offers an extensive analysis of the reactive power requirements of a VFT in a two-area power system under various operating conditions.
2. In order to integrate the STATCOM in a two-area power system based on the VFT, a reactive power compensation by STATCOM controlled by ANN-based PID is examined, and a voltage regulation control scheme is put into place.

The elementary idea of this article comprises (i) reference current estimation using a Lyapunov function-based variable conductance factor approach for the flexible operation of a grid-integrated solar photovoltaic-fed three-phase multifunctional converter (3PMFC), resulting in less computational burden, and (ii) generation of optimal switching signals for the 3PMFC and the dc-dc boost converters using model predictive control under dynamic operation scenarios.

The method aims to reduce the computational burden of model predictive control of cascaded H-bridge multilevel converters. It uses a double-vector voltage control approach to achieve a fixed switching frequency, and a hierarchical structure to control the grid current and dc-side output capacitor voltages.

Commutation moments and durations of the FCS-MPCC of BLDC motor are captured and determined with a new approach. Moreover, three-phase back EMFs of the BLDC motor applied to FCS-MPCC to predict the stator phase currents are estimated with a novel adaptive extended Kalman filter which has the estimation capability without any speed sensor.

The proposed work presents a novel compact and shadow resistance-to-frequency converter and resistance-to-time converter.

This paper introduces a novel end-to-end placement method of macro cells in chip design based on reinforcement learning. By assessing on the public benchmark ISPD2005, the proposed method can effectively solve the overlap problem between macro cells while considering routing congestion and shortening the total wire length to ensure routability.