Article Index - VLSI Design - Wiley Online Library

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oa

A Fast ALU Design in CMOS for Low Voltage Operation
A. Srivastava, D. Govindarajan,

First published: 25 April 2001
- Abstract
- PDF
Article
Open Access

oa

A Novel, Automatic Quality Control Scheme for Real Time Image Transmission
S. Ramachandran, S. Srinivasan,

First published: 05 December 2000
- Abstract
- PDF
Article
Open Access

oa

Fast Inner Product Computation on Short Buses
R. Lin, S. Olariu,

First published: 12 April 2001
- Abstract
- PDF
Article
Open Access

oa

Design Procedure Based on VHDL Language Transformations
László Varga, Gábor Hosszú, Ferenc Kovács,

First published: 10 March 2000
- Abstract
- PDF
Article
Open Access

oa

A Noise-shaping Accelerometer Interface Circuit for Two-chip Implementation
Tetsuya Kajita, Un-Ku Moon, Gabor C. Temes,

First published: 05 December 2000
- Abstract
- PDF
Article
Open Access

oa

Word-serial Architectures for Filtering and Variable Rate Decimation
Eugene Grayver, Babak Daneshrad,

First published: 02 January 2001
- Abstract
- PDF
Article
Open Access

oa

Design of an Inter-plane Circuit for Clocked PLAs
Chua-Chin Wang, Ya-Hsin Hsueh, Yu-Tsun Chien, Ying-Pei Chen,

First published: 16 March 2001
- Abstract
- PDF
Article
Open Access

oa

Improved Design of C²PL 3-2 Compressors for Inner Product Processing
Chua-Chin Wang, Po-Ming Lee, Chenn-Jung Huang,

First published: 16 March 2001
- Abstract
- PDF
Article
Open Access

oa

A Fast Dynamic 64-bit Comparator with Small Transistor Count
Chua-Chin Wang, Ya-Hsin Hsueh, Hsin-Long Wu, Chih-Feng Wu,

First published: 16 March 2001
- Abstract
- PDF
Research Article
Open Access

oa

Guest Editorial
Sunil R. Das,

First published: 01 January 1993

Collections: VLSI Testing
- PDF
Research Article
Open Access

oa

Theory, Analysis and Implementation of an On-Line BIST Technique
Rajiv Sharma, Kewal K. Saluja,

First published: 01 January 1993

Collections: VLSI Testing
- Abstract
- PDF
Research Article
Open Access

oa

Analysis and Design of Regular Structures for Robust Dynamic Fault Testability
Michael J. Bryan, Srinivas Devadas, Kurt Keutzer,

First published: 01 January 1993

Collections: VLSI Testing
- Abstract
- PDF
Article
Open Access

oa

Coverage of Node Shorts Using Internal Access and Equivalence Classes
Warren H. Debany,

First published: 01 January 1993

Collections: VLSI Testing
- Abstract
- PDF
Article
Open Access

oa

Editorial
First published: 01 January 1993

Collections: VLSI Testing
- PDF
Article
Open Access

oa

About the Editor in Chief and the Guest Editor
First published: 01 January 1993

Collections: VLSI Testing
- PDF
Research Article
Open Access

oa

Overlapped Subarray Segmentation: An Efficient Test Method for Cellular Arrays
Earl E. Swartzlander, Miroslaw Malek,

First published: 01 January 1993

Collections: VLSI Testing
- Abstract
- PDF
Article
Open Access

oa

Built-In Self-Test: Milestones and Challenges
Jacob Savir, Paul H. Bardell,

First published: 01 January 1993

Collections: VLSI Testing
- Abstract
- PDF
Article
Open Access

oa

Conditional Disconnection Probability in Star Graphs
Walid Najjar, Pradip K. Srimani,

First published: 01 January 1993

Collections: VLSI Testing
- Abstract
- PDF
Article
Open Access

oa

Computer-Aided Testing Systems: Evaluation and Benchmark Circuits
Samiha Mourad,

First published: 01 January 1993

Collections: VLSI Testing
- Abstract
- PDF
Research Article
Open Access

oa

Distributed and Parallel Demand Driven Logic Simulation Algorithms
K. Subramanian, M. Zargham,

First published: 20 February 1990
- Abstract
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VLSI Design

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All VLSI Design Articles

oa

A Fast ALU Design in CMOS for Low Voltage Operation

oa

A Novel, Automatic Quality Control Scheme for Real Time Image Transmission

oa

Fast Inner Product Computation on Short Buses

oa

Design Procedure Based on VHDL Language Transformations

oa

A Noise-shaping Accelerometer Interface Circuit for Two-chip Implementation

oa

Word-serial Architectures for Filtering and Variable Rate Decimation

oa

Design of an Inter-plane Circuit for Clocked PLAs

oa

Improved Design of C²PL 3-2 Compressors for Inner Product Processing

oa

A Fast Dynamic 64-bit Comparator with Small Transistor Count

oa

Guest Editorial

oa

Theory, Analysis and Implementation of an On-Line BIST Technique

oa

Analysis and Design of Regular Structures for Robust Dynamic Fault Testability

oa

Coverage of Node Shorts Using Internal Access and Equivalence Classes

oa

Editorial

oa

About the Editor in Chief and the Guest Editor

oa

Overlapped Subarray Segmentation: An Efficient Test Method for Cellular Arrays

oa

Built-In Self-Test: Milestones and Challenges

oa

Conditional Disconnection Probability in Star Graphs

oa

Computer-Aided Testing Systems: Evaluation and Benchmark Circuits

oa

Distributed and Parallel Demand Driven Logic Simulation Algorithms

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oa A Fast ALU Design in CMOS for Low Voltage Operation

oa A Novel, Automatic Quality Control Scheme for Real Time Image Transmission

oa Fast Inner Product Computation on Short Buses

oa Design Procedure Based on VHDL Language Transformations

oa A Noise-shaping Accelerometer Interface Circuit for Two-chip Implementation

oa Word-serial Architectures for Filtering and Variable Rate Decimation

oa Design of an Inter-plane Circuit for Clocked PLAs

oa Improved Design of C2PL 3-2 Compressors for Inner Product Processing

oa A Fast Dynamic 64-bit Comparator with Small Transistor Count

oa Guest Editorial

oa Theory, Analysis and Implementation of an On-Line BIST Technique

oa Analysis and Design of Regular Structures for Robust Dynamic Fault Testability

oa Coverage of Node Shorts Using Internal Access and Equivalence Classes

oa Editorial

oa About the Editor in Chief and the Guest Editor

oa Overlapped Subarray Segmentation: An Efficient Test Method for Cellular Arrays

oa Built-In Self-Test: Milestones and Challenges

oa Conditional Disconnection Probability in Star Graphs

oa Computer-Aided Testing Systems: Evaluation and Benchmark Circuits

oa Distributed and Parallel Demand Driven Logic Simulation Algorithms

oa

A Fast ALU Design in CMOS for Low Voltage Operation

oa

A Novel, Automatic Quality Control Scheme for Real Time Image Transmission

oa

Fast Inner Product Computation on Short Buses

oa

Design Procedure Based on VHDL Language Transformations

oa

A Noise-shaping Accelerometer Interface Circuit for Two-chip Implementation

oa

Word-serial Architectures for Filtering and Variable Rate Decimation

oa

Design of an Inter-plane Circuit for Clocked PLAs

oa

Improved Design of C²PL 3-2 Compressors for Inner Product Processing

oa

A Fast Dynamic 64-bit Comparator with Small Transistor Count

oa

Guest Editorial

oa

Theory, Analysis and Implementation of an On-Line BIST Technique

oa

Analysis and Design of Regular Structures for Robust Dynamic Fault Testability

oa

Coverage of Node Shorts Using Internal Access and Equivalence Classes

oa

Editorial

oa

About the Editor in Chief and the Guest Editor

oa

Overlapped Subarray Segmentation: An Efficient Test Method for Cellular Arrays

oa

Built-In Self-Test: Milestones and Challenges

oa

Conditional Disconnection Probability in Star Graphs

oa

Computer-Aided Testing Systems: Evaluation and Benchmark Circuits

oa

Distributed and Parallel Demand Driven Logic Simulation Algorithms