Article Index - International Journal of Reconfigurable Computing

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Research Article
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Efficient Realization of BCD Multipliers Using FPGAs
Shuli Gao, Dhamin Al-Khalili, J. M. Pierre Langlois, Noureddine Chabini,

First published: 06 March 2017
Research Article
Open Access

oa

Fuzzy Logic Based Hardware Accelerator with Partially Reconfigurable Defuzzification Stage for Image Edge Detection
Aous H. Kurdi, Janos L. Grantner, Ikhlas M. Abdel-Qader,

First published: 01 March 2017
Review Article
Open Access

oa

Operating System Concepts for Reconfigurable Computing: Review and Survey
Marcel Eckert, Dominik Meyer, Jan Haase, Bernd Klauer,

First published: 30 November 2016
Letter to the Editor
Open Access

oa

Comment on “High Efficiency Generalized Parallel Counters for Look-Up Table Based FPGAs”
Martin Kumm, Peter Zipf,

First published: 14 September 2016
Research Article
Open Access

oa

An Efficient FPGA Implementation of Optimized Anisotropic Diffusion Filtering of Images
Chandrajit Pal, Avik Kotal, Asit Samanta, Amlan Chakrabarti, Ranjan Ghosh,

First published: 18 July 2016
Research Article
Open Access

oa

FPGA Based High Speed SPA Resistant Elliptic Curve Scalar Multiplier Architecture
Khalid Javeed, Xiaojun Wang,

First published: 10 July 2016
Research Article
Open Access

oa

An Accelerating Solution for N-Body MOND Simulation with FPGA-SoC
Bo Peng, Tianqi Wang, Xi Jin, Chuanjun Wang,

First published: 12 June 2016
Research Article
Open Access

oa

An FPGA-Based Quantum Computing Emulation Framework Based on Serial-Parallel Architecture
Y. H. Lee, M. Khalil-Hani, M. N. Marsono,

First published: 07 April 2016
Research Article
Open Access

oa

FPGA-Based Real-Time Moving Target Detection System for Unmanned Aerial Vehicle Application
Jia Wei Tang, Nasir Shaikh-Husin, Usman Ullah Sheikh, M. N. Marsono,

First published: 04 April 2016
Research Article
Open Access

oa

Modules for Pipelined Mixed Radix FFT Processors
Anatolij Sergiyenko, Anastasia Serhienko,

First published: 22 March 2016
Research Article
Open Access

oa

How to Efficiently Reconfigure Tunable Lookup Tables for Dynamic Circuit Specialization
Amit Kulkarni, Dirk Stroobandt,

First published: 21 March 2016
Research Article
Open Access

oa

On-Chip Reconfigurable Hardware Accelerators for Popcount Computations
Valery Sklyarov, Iouliia Skliarova, João Silva,

First published: 10 March 2016
Research Article
Open Access

oa

An Efficient Evolutionary Task Scheduling/Binding Framework for Reconfigurable Systems
A. Al-Wattar, S. Areibi, G. Grewal,

First published: 07 March 2016
Research Article
Open Access

oa

XOR-FREE Implementation of Convolutional Encoder for Reconfigurable Hardware
Gaurav Purohit, Kota Solomon Raju, Vinod Kumar Chaubey,

First published: 23 February 2016
Research Article
Open Access

oa

A Scalable Unsegmented Multiport Memory for FPGA-Based Systems
Kevin R. Townsend, Osama G. Attia, Phillip H. Jones, Joseph Zambreno,

First published: 31 December 2015
Research Article
Open Access

oa

Exploring Trade-Offs between Specialized Dataflow Kernels and a Reusable Overlay in a Stereo Matching Case Study
Tobias Kenter, Henning Schmitz, Christian Plessl,

First published: 30 December 2015
Research Article
Open Access

oa

AC_ICAP: A Flexible High Speed ICAP Controller
Luis Andres Cardona, Carles Ferrer,

First published: 17 December 2015
Research Article
Open Access

oa

Dynamic Task Distribution Model for On-Chip Reconfigurable High Speed Computing System
Mahendra Vucha, Arvind Rajawat,

First published: 10 December 2015
Research Article
Open Access

oa

An Improved Diffusion Based Placement Algorithm for Reducing Interconnect Demand in Congested Regions of FPGAs
Ali Asghar, Husain Parvez,

First published: 11 November 2015
Research Article
Open Access

oa

High Efficiency Generalized Parallel Counters for Look-Up Table Based FPGAs
Burhan Khurshid, Roohie Naaz Mir,

First published: 19 October 2015

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International Journal of Reconfigurable Computing

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All International Journal of Reconfigurable Computing Articles

oa

Efficient Realization of BCD Multipliers Using FPGAs

oa

Fuzzy Logic Based Hardware Accelerator with Partially Reconfigurable Defuzzification Stage for Image Edge Detection

oa

Operating System Concepts for Reconfigurable Computing: Review and Survey

oa

Comment on “High Efficiency Generalized Parallel Counters for Look-Up Table Based FPGAs”

oa

An Efficient FPGA Implementation of Optimized Anisotropic Diffusion Filtering of Images

oa

FPGA Based High Speed SPA Resistant Elliptic Curve Scalar Multiplier Architecture

oa

An Accelerating Solution for N-Body MOND Simulation with FPGA-SoC

oa

An FPGA-Based Quantum Computing Emulation Framework Based on Serial-Parallel Architecture

oa

FPGA-Based Real-Time Moving Target Detection System for Unmanned Aerial Vehicle Application

oa

Modules for Pipelined Mixed Radix FFT Processors

oa

How to Efficiently Reconfigure Tunable Lookup Tables for Dynamic Circuit Specialization

oa

On-Chip Reconfigurable Hardware Accelerators for Popcount Computations

oa

An Efficient Evolutionary Task Scheduling/Binding Framework for Reconfigurable Systems

oa

XOR-FREE Implementation of Convolutional Encoder for Reconfigurable Hardware

oa

A Scalable Unsegmented Multiport Memory for FPGA-Based Systems

oa

Exploring Trade-Offs between Specialized Dataflow Kernels and a Reusable Overlay in a Stereo Matching Case Study

oa

AC_ICAP: A Flexible High Speed ICAP Controller

oa

Dynamic Task Distribution Model for On-Chip Reconfigurable High Speed Computing System

oa

An Improved Diffusion Based Placement Algorithm for Reducing Interconnect Demand in Congested Regions of FPGAs

oa

High Efficiency Generalized Parallel Counters for Look-Up Table Based FPGAs

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All International Journal of Reconfigurable Computing Articles

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oa Efficient Realization of BCD Multipliers Using FPGAs

oa Fuzzy Logic Based Hardware Accelerator with Partially Reconfigurable Defuzzification Stage for Image Edge Detection

oa Operating System Concepts for Reconfigurable Computing: Review and Survey

oa Comment on “High Efficiency Generalized Parallel Counters for Look-Up Table Based FPGAs”

oa An Efficient FPGA Implementation of Optimized Anisotropic Diffusion Filtering of Images

oa FPGA Based High Speed SPA Resistant Elliptic Curve Scalar Multiplier Architecture

oa An Accelerating Solution for N-Body MOND Simulation with FPGA-SoC

oa An FPGA-Based Quantum Computing Emulation Framework Based on Serial-Parallel Architecture

oa FPGA-Based Real-Time Moving Target Detection System for Unmanned Aerial Vehicle Application

oa Modules for Pipelined Mixed Radix FFT Processors

oa How to Efficiently Reconfigure Tunable Lookup Tables for Dynamic Circuit Specialization

oa On-Chip Reconfigurable Hardware Accelerators for Popcount Computations

oa An Efficient Evolutionary Task Scheduling/Binding Framework for Reconfigurable Systems

oa XOR-FREE Implementation of Convolutional Encoder for Reconfigurable Hardware

oa A Scalable Unsegmented Multiport Memory for FPGA-Based Systems

oa Exploring Trade-Offs between Specialized Dataflow Kernels and a Reusable Overlay in a Stereo Matching Case Study

oa AC_ICAP: A Flexible High Speed ICAP Controller

oa Dynamic Task Distribution Model for On-Chip Reconfigurable High Speed Computing System

oa An Improved Diffusion Based Placement Algorithm for Reducing Interconnect Demand in Congested Regions of FPGAs

oa High Efficiency Generalized Parallel Counters for Look-Up Table Based FPGAs

oa

Efficient Realization of BCD Multipliers Using FPGAs

oa

Fuzzy Logic Based Hardware Accelerator with Partially Reconfigurable Defuzzification Stage for Image Edge Detection

oa

Operating System Concepts for Reconfigurable Computing: Review and Survey

oa

Comment on “High Efficiency Generalized Parallel Counters for Look-Up Table Based FPGAs”

oa

An Efficient FPGA Implementation of Optimized Anisotropic Diffusion Filtering of Images

oa

FPGA Based High Speed SPA Resistant Elliptic Curve Scalar Multiplier Architecture

oa

An Accelerating Solution for N-Body MOND Simulation with FPGA-SoC

oa

An FPGA-Based Quantum Computing Emulation Framework Based on Serial-Parallel Architecture

oa

FPGA-Based Real-Time Moving Target Detection System for Unmanned Aerial Vehicle Application

oa

Modules for Pipelined Mixed Radix FFT Processors

oa

How to Efficiently Reconfigure Tunable Lookup Tables for Dynamic Circuit Specialization

oa

On-Chip Reconfigurable Hardware Accelerators for Popcount Computations

oa

An Efficient Evolutionary Task Scheduling/Binding Framework for Reconfigurable Systems

oa

XOR-FREE Implementation of Convolutional Encoder for Reconfigurable Hardware

oa

A Scalable Unsegmented Multiport Memory for FPGA-Based Systems

oa

Exploring Trade-Offs between Specialized Dataflow Kernels and a Reusable Overlay in a Stereo Matching Case Study

oa

AC_ICAP: A Flexible High Speed ICAP Controller

oa

Dynamic Task Distribution Model for On-Chip Reconfigurable High Speed Computing System

oa

An Improved Diffusion Based Placement Algorithm for Reducing Interconnect Demand in Congested Regions of FPGAs

oa

High Efficiency Generalized Parallel Counters for Look-Up Table Based FPGAs