Article Index - International Journal of Reconfigurable Computing

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Research Article
Open Access

oa

Hardware Obfuscation Based Watermarking Technique for IPR Ownership Identification
Priyanka Bagul, Vandana Inamdar,

First published: 03 July 2023
Research Article
Open Access

oa

Open-Source Ethernet MAC IP Cores for FPGAs: Overview and Evaluation
Christian Fibich, Patrick Schmitt, Roland Höller, Peter Rössler,

First published: 23 May 2023
Research Article
Open Access

oa

A Methodology for an FPGA Implementation of a Programmable Logic Controller to Control an Atomic Layer Deposition System
Peter Jamieson, Donald Blank, Janelle Ghanem, Tyler McGrew, Giancarlo Corti,

First published: 06 May 2022
Research Article
Open Access

oa

A Decision-Making Method Providing Sustainability to FPGA-Based SoCs by Run-Time Structural Adaptation to Mode of Operation, Power Budget, and Die Temperature Variations
Dimple Sharma, Lev Kirischian,

First published: 01 September 2021
Research Article
Open Access

oa

A Service-Oriented Component-Based Framework for Dynamic Reconfiguration Modeling Targeting SystemC/TLM
Khaled Allem, El-Bay Bourennane, Youcef Khelfaoui,

First published: 03 August 2021
Research Article
Open Access

oa

A Method for Run-Time Prediction of On-Chip Thermal Conditions in Dynamically Reconfigurable SOPCs
Dimple Sharma, Lev Kirischian,

First published: 07 January 2021
Editorial
Open Access

oa

FPGAs for Domain Experts
Wim Vanderbauwhede, Sven-Bodo Scholz, Martin Margala,

First published: 27 October 2020

Collections: FPGAs for Domain Experts
Research Article
Open Access

oa

FPGA Implementation of A ^∗ Algorithm for Real-Time Path Planning
Yuzhi Zhou, Xi Jin, Tianqi Wang,

First published: 17 August 2020
Research Article
Open Access

oa

Dynamic Reliability Management for FPGA-Based Systems
Jahanzeb Anwer, Sebastian Meisner, Marco Platzner,

First published: 13 June 2020
Research Article
Open Access

oa

SIFO: Secure Computational Infrastructure Using FPGA Overlays
Xin Fang, Stratis Ioannidis, Miriam Leeser,

First published: 06 December 2019
Review Article
Open Access

oa

From FPGA to Support Cloud to Cloud of FPGA: State of the Art
Rym Skhiri, Virginie Fresse, Jean Paul Jamont, Benoit Suffran, Jihene Malek,

First published: 05 December 2019
Research Article
Open Access

oa

Automatic Pipelining and Vectorization of Scientific Code for FPGAs
Syed Waqar Nabi, Wim Vanderbauwhede,

First published: 18 November 2019

Collections: FPGAs for Domain Experts
Research Article
Open Access

oa

ViPar: High-Level Design Space Exploration for Parallel Video Processing Architectures
Karim M. A. Ali, Rabie Ben Atitallah, Abdessamad Ait El Cadi, Nizar Fakhfakh, Jean-Luc Dekeyser,

First published: 14 November 2019
Research Article
Open Access

oa

Dimension Reduction Using Quantum Wavelet Transform on a High-Performance Reconfigurable Computer
Naveed Mahmud, Esam El-Araby,

First published: 11 November 2019

Collections: FPGAs for Domain Experts
Research Article
Open Access

oa

Translating Timing into an Architecture: The Synergy of COTSon and HLS (Domain Expertise—Designing a Computer Architecture via HLS)
Roberto Giorgi, Farnam Khalili, Marco Procaccini,

First published: 03 November 2019

Collections: FPGAs for Domain Experts
Research Article
Open Access

oa

An FPGA-Based Hardware Accelerator for CNNs Using On-Chip Memories Only: Design and Benchmarking with Intel Movidius Neural Compute Stick
Gianmarco Dinelli, Gabriele Meoni, Emilio Rapuano, Gionata Benelli, Luca Fanucci,

First published: 22 October 2019

Collections: FPGAs for Domain Experts
Research Article
Open Access

oa

Implementing and Evaluating an Heterogeneous, Scalable, Tridiagonal Linear System Solver with OpenCL to Target FPGAs, GPUs, and CPUs
Hamish J. Macintosh, Jasmine E. Banks, Neil A. Kelson,

First published: 13 October 2019

Collections: FPGAs for Domain Experts
Research Article
Open Access

oa

A Real-Time Capable Dynamic Partial Reconfiguration System for an Application-Specific Soft-Core Processor
Michael Kirchhoff, Philipp Kerling, Detlef Streitferdt, Wolfgang Fengler,

First published: 22 September 2019
Research Article
Open Access

oa

FPGA Implementation of an Improved Reconfigurable FSMIM Architecture Using Logarithmic Barrier Function Based Gradient Descent Approach
Nitish Das, Aruna Priya P,

First published: 01 April 2019
Research Article
Open Access

oa

Exposing End-to-End Delay in Software-Defined Networking
Ting Zhang, Bin Liu,

First published: 04 March 2019

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International Journal of Reconfigurable Computing

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All International Journal of Reconfigurable Computing Articles

oa

Hardware Obfuscation Based Watermarking Technique for IPR Ownership Identification

oa

Open-Source Ethernet MAC IP Cores for FPGAs: Overview and Evaluation

oa

A Methodology for an FPGA Implementation of a Programmable Logic Controller to Control an Atomic Layer Deposition System

oa

A Decision-Making Method Providing Sustainability to FPGA-Based SoCs by Run-Time Structural Adaptation to Mode of Operation, Power Budget, and Die Temperature Variations

oa

A Service-Oriented Component-Based Framework for Dynamic Reconfiguration Modeling Targeting SystemC/TLM

oa

A Method for Run-Time Prediction of On-Chip Thermal Conditions in Dynamically Reconfigurable SOPCs

oa

FPGAs for Domain Experts

oa

FPGA Implementation of A ^∗ Algorithm for Real-Time Path Planning

oa

Dynamic Reliability Management for FPGA-Based Systems

oa

SIFO: Secure Computational Infrastructure Using FPGA Overlays

oa

From FPGA to Support Cloud to Cloud of FPGA: State of the Art

oa

Automatic Pipelining and Vectorization of Scientific Code for FPGAs

oa

ViPar: High-Level Design Space Exploration for Parallel Video Processing Architectures

oa

Dimension Reduction Using Quantum Wavelet Transform on a High-Performance Reconfigurable Computer

oa

Translating Timing into an Architecture: The Synergy of COTSon and HLS (Domain Expertise—Designing a Computer Architecture via HLS)

oa

An FPGA-Based Hardware Accelerator for CNNs Using On-Chip Memories Only: Design and Benchmarking with Intel Movidius Neural Compute Stick

oa

Implementing and Evaluating an Heterogeneous, Scalable, Tridiagonal Linear System Solver with OpenCL to Target FPGAs, GPUs, and CPUs

oa

A Real-Time Capable Dynamic Partial Reconfiguration System for an Application-Specific Soft-Core Processor

oa

FPGA Implementation of an Improved Reconfigurable FSMIM Architecture Using Logarithmic Barrier Function Based Gradient Descent Approach

oa

Exposing End-to-End Delay in Software-Defined Networking

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All International Journal of Reconfigurable Computing Articles

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oa Hardware Obfuscation Based Watermarking Technique for IPR Ownership Identification

oa Open-Source Ethernet MAC IP Cores for FPGAs: Overview and Evaluation

oa A Methodology for an FPGA Implementation of a Programmable Logic Controller to Control an Atomic Layer Deposition System

oa A Decision-Making Method Providing Sustainability to FPGA-Based SoCs by Run-Time Structural Adaptation to Mode of Operation, Power Budget, and Die Temperature Variations

oa A Service-Oriented Component-Based Framework for Dynamic Reconfiguration Modeling Targeting SystemC/TLM

oa A Method for Run-Time Prediction of On-Chip Thermal Conditions in Dynamically Reconfigurable SOPCs

oa FPGAs for Domain Experts

oa FPGA Implementation of A ∗ Algorithm for Real-Time Path Planning

oa Dynamic Reliability Management for FPGA-Based Systems

oa SIFO: Secure Computational Infrastructure Using FPGA Overlays

oa From FPGA to Support Cloud to Cloud of FPGA: State of the Art

oa Automatic Pipelining and Vectorization of Scientific Code for FPGAs

oa ViPar: High-Level Design Space Exploration for Parallel Video Processing Architectures

oa Dimension Reduction Using Quantum Wavelet Transform on a High-Performance Reconfigurable Computer

oa Translating Timing into an Architecture: The Synergy of COTSon and HLS (Domain Expertise—Designing a Computer Architecture via HLS)

oa An FPGA-Based Hardware Accelerator for CNNs Using On-Chip Memories Only: Design and Benchmarking with Intel Movidius Neural Compute Stick

oa Implementing and Evaluating an Heterogeneous, Scalable, Tridiagonal Linear System Solver with OpenCL to Target FPGAs, GPUs, and CPUs

oa A Real-Time Capable Dynamic Partial Reconfiguration System for an Application-Specific Soft-Core Processor

oa FPGA Implementation of an Improved Reconfigurable FSMIM Architecture Using Logarithmic Barrier Function Based Gradient Descent Approach

oa Exposing End-to-End Delay in Software-Defined Networking

oa

Hardware Obfuscation Based Watermarking Technique for IPR Ownership Identification

oa

Open-Source Ethernet MAC IP Cores for FPGAs: Overview and Evaluation

oa

A Methodology for an FPGA Implementation of a Programmable Logic Controller to Control an Atomic Layer Deposition System

oa

A Decision-Making Method Providing Sustainability to FPGA-Based SoCs by Run-Time Structural Adaptation to Mode of Operation, Power Budget, and Die Temperature Variations

oa

A Service-Oriented Component-Based Framework for Dynamic Reconfiguration Modeling Targeting SystemC/TLM

oa

A Method for Run-Time Prediction of On-Chip Thermal Conditions in Dynamically Reconfigurable SOPCs

oa

FPGAs for Domain Experts

oa

FPGA Implementation of A ^∗ Algorithm for Real-Time Path Planning

oa

Dynamic Reliability Management for FPGA-Based Systems

oa

SIFO: Secure Computational Infrastructure Using FPGA Overlays

oa

From FPGA to Support Cloud to Cloud of FPGA: State of the Art

oa

Automatic Pipelining and Vectorization of Scientific Code for FPGAs

oa

ViPar: High-Level Design Space Exploration for Parallel Video Processing Architectures

oa

Dimension Reduction Using Quantum Wavelet Transform on a High-Performance Reconfigurable Computer

oa

Translating Timing into an Architecture: The Synergy of COTSon and HLS (Domain Expertise—Designing a Computer Architecture via HLS)

oa

An FPGA-Based Hardware Accelerator for CNNs Using On-Chip Memories Only: Design and Benchmarking with Intel Movidius Neural Compute Stick

oa

Implementing and Evaluating an Heterogeneous, Scalable, Tridiagonal Linear System Solver with OpenCL to Target FPGAs, GPUs, and CPUs

oa

A Real-Time Capable Dynamic Partial Reconfiguration System for an Application-Specific Soft-Core Processor

oa

FPGA Implementation of an Improved Reconfigurable FSMIM Architecture Using Logarithmic Barrier Function Based Gradient Descent Approach

oa

Exposing End-to-End Delay in Software-Defined Networking