Volume 54, Issue 3 pp. 577-579

K-band, low-power CMOS injection-locked divide-by-three circuit using shunt-peaking and current-bleeding techniques

Pei-Kang Tsai

Corresponding Author

Pei-Kang Tsai

Department of Electrical Engineering, National Cheng Kung University 1, Tainan 70101, Taiwan, Republic of China

Department of Electrical Engineering, National Cheng Kung University 1, Tainan 70101, Taiwan, Republic of ChinaSearch for more papers by this author
Chih-Yu Liu

Chih-Yu Liu

Department of Electrical Engineering, National Cheng Kung University 1, Tainan 70101, Taiwan, Republic of China

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Tzuen-Hsi Huang

Tzuen-Hsi Huang

Department of Electrical Engineering, National Cheng Kung University 1, Tainan 70101, Taiwan, Republic of China

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Janne-Wha Wu

Janne-Wha Wu

Department of Electrical Engineering, National Chung Cheng University, Chia-Yi 62102, Taiwan, Republic of China

Department of Communications Engineering, National Chung Cheng University, Chia-Yi 62102, Taiwan, R.O.C

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First published: 20 January 2012
Citations: 2

Abstract

A CMOS divide-by-three injection-locked frequency divider having a wide input locking range of 23–27 GHz is proposed.The wide locking range is achieved by combining the shunt-peaking and current-bleeding techniques. The proposed circuit is fabricated using a 0.18-μm RF CMOS process, and the measured operation range (i.e., total locking range) is 4.32 GHz (from 23.17 to 27.49 GHz) for an input injection power of +4 dBm. The power consumption is 4.28 mW at a supply voltage of 1.2 V. The second- and third-order harmonic suppressions are 38.05 and 37.89 dBc, respectively, for a divided output frequency of 8.4 GHz. The output phase noise under lock at an offset of 1 MHz with an input injection power of +4 dBm is −139 dBc/Hz. © 2012 Wiley Periodicals, Inc. Microwave Opt Technol Lett 54:577–579, 2012; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.26648

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