1 Introduction

GaN-based high-electron-mobility-transistors (HEMTs) are being extensively used for high-power millimeter-wave applications owing to their outstanding properties such as high thermal and chemical stability, high breakdown field (3.3 MV cm⁻¹), and high-electron saturation velocity (2.5 × 10⁷cm s⁻¹) resulting in superior performances.^{[1, 2]} Because of the large lattice and thermal expansion coefficient mismatch between GaN and silicon carbide (SiC), silicon (Si), or sapphire substrates, GaN HEMTs are typically grown with thick buffer layers (several μm) to minimize growth defects/dislocations at the vicinity of the 2DEG.^[3-6] However, a thick buffer degrades the thermal dissipation and increases the epiwafer cost. Some recent reports have demonstrated promising DC and RF performances of AlGaN/GaN HEMTs grown on SiC with a total thickness lower than 1 μm.^{[7, 8]} However, the large thermal expansion coefficient difference makes the growth on Si substrates even more challenging; thus, high performance with submicrometer-thick GaN HEMTs have not been proven yet to our knowledge.^[9-13] Moreover, although AlGaN/GaN HEMT is the most mature technology, which demonstrated outstanding power performances in the microwave range, the device downscaling for higher frequency of operation generally results in a reduced breakdown voltage degrading the overall device performances.^[14-18] In this work, we demonstrate the possibility to achieve a high vertical buffer breakdown field in a submicrometer-thick epistack. The high breakdown field is understood to originate from the use of Al-rich AlGaN buffer layers and a high-quality AlN nucleation layer (NL). Furthermore, large signal performances at 10 GHz have been carried out on short devices with a gate length of 100 nm. The results show the potential of this thin AlGaN/GaN-on-Si heterostructure for high-frequency applications.

2 Experimental Section

Figure 1 shows the cross section of the HEMT structures. Two different AlN NLs with thickness 1 (t₁) lower than 100 nm and thickness 2 (t₂) between 100 and 300 nm were grown by ammonia-assisted molecular beam epitaxy (NH₃-MBE) on highly resistive Si(111) substrates (ρ > 5 kΩ cm) using a RIBER MBE49 growth reactor. The structure was then followed by three step-graded Al_xGa_1−xN buffer layers (Al_0.60Ga_0.40N/Al_0.30Ga_0.70N/Al_0.08Ga_0.92N), a 150 nm-thick GaN channel layer, a 1 nm-thick AlN spacer, and a 14 nm-thick Al_0.32Ga_0.68N barrier. Finally, the structure was capped with a GaN layer. The total stack thickness was less than 650 nm for the structure with AlN NL t₁ and the second structure had also a total thickness below 1 μm. The step-graded Al_xGa_1−xN buffer was used both to enhance the electron confinement and the breakdown voltage by increasing the overall bandgap. Device processing started with the formation of the source and drain ohmic contacts by partially etching the AlGaN barrier layer with BCl₃/SF₆ plasma in an inductively coupled plasma (ICP) reactor prior to the metallization. A Ti/Al/Ni/Au metal stack was deposited and annealed at 800 °C. The devices were isolated using nitrogen implantation. Then, Ni/Au gates of 3 μm length were defined by optical lithography. Finally, the devices were passivated with 200 nm plasma-enhanced chemical vapor deposition (PECVD) Si₃N₄ prior to the Ti/Au pads deposition enabling electrical measurements. The 2DEG properties were extracted at room temperature by Hall effect measurements and showed a charge density of 1.1 × 10¹³ and 1.3 × 10¹³ cm⁻² with an electron mobility of 1050 cm² V⁻¹ s and 1530 cm² V⁻¹ s for AlN NL t₁ and t₂, respectively. The AlN NL thickness indirectly impacted the electron mobility. Indeed, when increasing the thickness of the AlN, the crystalline quality was improved (with less dislocations and larger grains). In addition, the step-graded Al_xGa_1−xN buffer layers on top and the GaN channel layer were more compressed, which led to an overall better crystalline quality, resulting in an increased electron mobility of the 2DEG.

3 DC and Breakdown Characteristics

Vertical breakdown voltage measurements with a grounded substrate and isolated ohmic contacts on the front side have been performed using a Keysight B1505A high-voltage parameter analyzer. Figure 2 shows typical vertical leakage characteristics of the heterostructures at room temperature measured on several locations across the samples.

Despite the submicrometer-thick epistack, the leakage current distribution is rather uniform showing that a thick buffer is not mandatory to maintain a high material quality close to the 2DEG. It can also be noticed that a leakage current below 1 mA cm⁻² is observed up to 400 V with a hard breakdown voltage of 500 V for AlN NL t₁. This results in a remarkable vertical breakdown field higher than 6 MV cm⁻¹ (calculated by normalizing the hard breakdown voltage with the total epistack thickness), which is significantly higher than the theoretical value of 3 MV cm⁻¹ for GaN and close to the theoretical value of AlN. On the other hand, it can be pointed out that an AlN NL t₂ thicker than t₁ using the same epistack results in a much larger leakage current (Figure 2).

To better understand the origin of this result, we performed a decomposition study of the structure with AlN NL t₁ by etching several samples down to the different epilayers: GaN channel, Al_0.08Ga_0.92N, Al_0.30Ga_0.70N, Al_0.60Ga_0.40N, and Si substrate (Figure 3). The structure was first etched until the substrate, which shows a vertical breakdown voltage lower than 100 V. For all the other samples, this value was subtracted in order to remove the electrical contribution of the substrate on the vertical breakdown voltage. The vertical breakdown voltage of the different decomposed structures shows that the remarkable breakdown field is clearly attributed to the insertion of Al-rich AlGaN into the buffer layers combined with an optimized AlN NL, offering outstanding breakdown strength of about 15 MV cm⁻¹, close to the theoretical value of AlN.^[19]

The three-terminal off-state breakdown voltage has been measured at gate source voltage (V_GS) −6 V for various gate-to-drain distances varying from 5 to 40 μm and for AlN NL t₁ and t₂, as shown in Figure 4. It can be noticed that a drain leakage current (I_D) well below 100 μA mm⁻¹ up to drain source voltage (V_DS) 200 V is observed regardless of the device design for AlN NL t₁ (see Figure 4), while the AlN NL t₂ transistors deliver two orders of magnitude larger leakage current even at lower bias (see Figure 4). For both thicknesses, the transistor breakdown voltage of about 250 V is independent of the gate-to-drain distance due to the thin heterostructure.

In order to assess the full potential of the structure with an AlN NL t₁, the structure was reproduced and capped with an in situ SiN passivation layer to efficiently passivate the surface states. To increase the electric field below the gate, a similar fabrication process was used, with this time Ni/Au T gates defined by e-beam lithography allowing the formation of 100 nm gate lengths (L_G). DC measurements have been carried out on the structure with an AlN NL t₁ using a Keysight A2902A static modular and source monitor. Figure 5 shows typical output and transfer characteristics of 2 × 50 μm transistors with L_G of 100 nm and a gate-to-drain distance (L_GD) of 0.5 μm. The gate source voltage was swept from −6 to +2 V with a step size of 1 V. A low maximum drain current I_D,max of about 0.74 A mm⁻¹ has been measured due to the low 2DEG mobility of this structure (Figure 5a). A pinch-off voltage V_TH = −3.9 V (shown in Figure 5b) is observed with a drain leakage current lower than 1 μA mm⁻¹. Figure 5b displays the transfer characteristics with a compliance fixed at 150 mA mm⁻¹ and swept from V_DS = 2 to 30 V using a step of 1 V. A low-threshold voltage shift as a function of V_DS is observed under high electric field up to 30 V, which confirms a proper electron confinement within the 2DEG of the submicrometer step-graded Al_xGa_1−xN buffer reflected by a low-drain-induced barrier lowering (DIBL) of 100 mV mm⁻¹. A transconductance (G_m) of 200 mS mm⁻¹ has been measured (Figure 5c). However, this value can be significantly increased by reducing the access resistances. Currently, the contact resistances are as high as 0.6 Ω mm, as extracted by transmission line measurements. Pulsed I_D–V_DS characteristics revealing the charge trapping effects when using various quiescent bias points are depicted in Figure 5d. The open channel DC pulsed measurements are shown at V_GS = +2 V with various quiescent drain voltages at room temperature. The specific pulsed I–V protocol based on I–V characteristics has been settled with the following quiescent bias points: cold point at (V_GQ = 0 V, V_DQ = 0 V), gate lag at (V_GQ = −4 V, V_DQ = 0 V), and drain lag at (V_GQ = −4 V, V_DQ = 10, 15 and 20 V) using a pulse width of 1 μs and a duty cycle of 1%. 2 × 50 μm transistors with L_GD of 0.5 μm, and L_G of 100 nm reveals low charge-trapping effects as shown from the pulsed I_D–V_DS characteristics. Secondary-ion mass spectrometry (SIMS) of the submicrometer-thick GaN-on-Si HEMTs with AlN NL t₁ reveals unintentional carbon and oxygen doping in the structure. The carbon concentration is in the range of 1-5 × 10¹⁵ atoms cm⁻³ in the step-graded Al_xGa_1−xN buffer layers as well as in the GaN channel, while oxygen concentration is lower than 1 × 10¹⁷ atoms cm⁻³ in the buffer. This reduced unintentional carbon doping is considered low enough to avoid buffer trapping effects.^[20] The combination of low-carbon doping concentration in the buffer, a surface passivation with in situ SiN, and an optimized fabrication process leads to low charge-trapping effects.

4 10 GHz Large Signal Characteristics

Large signal characterizations have been carried out at 10 GHz on a nonlinear vector network analyzer system (Keysight Network Analyser: PNA-X, N5245A-NVNA) capable of on-wafer large signal device characterization up to the Q-band in continuous and pulsed mode. Further details of the power bench can be found in another study.^[21] Figure 6a,b shows power performances of 2 × 50 μm transistor with L_GD = 0.5 μm and L_G = 100 nm at V_DS = 10 V and 35 V, respectively. A saturated output power density (P_OUT) of 0.6 W mm⁻¹ associated with a power added efficiency (PAE) of 57.4% at V_DS = 10 V is measured. For V_DS = 35 V, a P_OUT of 1.6 W mm⁻¹ associated with PAE of 30.9% has been achieved. Moreover, after many load–pull sweeps, no degradation of the devices is observed up to V_DS = 35 V, as shown in Figure 6c. This proves that this heterostructure enables high-voltage operation without degradation despite the use of a gate length as short as 100 nm. The promising robustness is attributed to the high quality of the submicrometer-thick step-graded Al_xGa_1−xN buffer layers. The rather limited output power density is explained by the low maximum drain current of this structure, which depends on the electron mobility that needs to be further enhanced. Finally, the drop of the PAE between V_DS = 10 V and 35 V is attributed to the poor thermal dissipation of the Si substrate. Therefore, further optimization of the structure, together with substrate thinning and use of a heat sink, will significantly enhance the device's performance.

5 Conclusion

In this work, we investigated submicrometer-thick AlGaN/GaN HEMTs grown on Si(111) substrates for high-frequency applications. This MBE-grown heterostructure, with a buffer thickness below 650 nm including Al-rich step-graded layers, shows promising features such as an outstanding vertical breakdown field higher than 6 MV cm⁻¹. DC characteristics reveal fully functional transistors with low-off-state leakage current under high electric field up to 30 V despite a short gate length of 100 nm. This technology enables to operate the transistors under high drain bias at high frequency with enhanced robustness. This achievement is attributed to the optimization of the submicrometer-thick step-graded Al_xGa_1−xN buffer layer combined with an optimized AlN NL enabling high-electron confinement under high electric field.

Conflict of Interest

The authors declare no conflict of interest.