The potential of using gallium cerium oxide (Ga_xCe_yO_z) as a passivation layer (PL) on 4H-silicon carbide (SiC) substrates were thoroughly assessed after annealing in nitrogen–oxygen–nitrogen (N₂–O₂–N₂) ambient at varying temperatures of 600, 700, 800, and 900°C. It was observed that nitrogen ions introduced during the annealing process were predominantly attached to oxygen vacancies (V_o) within the oxide layer at lower temperatures (600 and 700°C), whereas at elevated temperatures (800 and 900°C), there was a substantial increase in the migration of nitrogen ions toward the interface of Ga_xCe_yO_z/4H-SiC. Analysis employing X-ray photoelectron spectroscopy (XPS) corroborated the transformation of Ce³⁺ to Ce⁴⁺ at 900°C due to enhanced reoxidation. As a result, the passivation of V_o at 800 and 900°C led to a significantly higher dielectric constant, improved breakdown field, and favorable values for slow trap density (STD), interface trap density, interface state density, as well as effective oxide charge, highlighting the potential of Ga_xCe_yO_z PL on 4H-SiC for use in metal–oxide–semiconductor (MOS) applications.

1. Introduction

In the pursuit of energy-efficient technologies to achieve sustainable solutions for the next generation of power electronic devices, various approaches utilizing wide bandgap semiconductor materials have been successfully adopted in the development of these power electronic devices. It was anticipated that wide bandgap semiconductors, especially 4H-silicon carbide (SiC), has emerged as the choice of semiconductor substrate for metal–oxide–semiconductor (MOS) devices that would provide excellent performance in meeting the future market demands of power electronic devices requiring high energy efficient, effective in heat dissipation, high switching frequency, and ability to operate at high temperatures [1]. The 4H-SiC was experiencing a profound exploration for high temperature as well as high power device applications owing to the possession of wide energy bandgap (3.26 eV), high saturation drift velocity (2.7 × 10⁷ cm/s), high thermal conductivity (~4.9 W cm⁻¹ K⁻¹), as well as high critical electrical field (~3 MV/cm) [2]. The possession of both wide energy bandgaps coupled with high thermal conductivity by 4H-SiC would allow the 4H-SiC-based MOS devices to operate reliably at high temperatures (>250°C) due to effective heat dissipation while Si-based MOS devices have displayed degradation in performance at this range of operating temperature [3–5]. Additionally, 4H-SiC-based MOS devices were able to achieve high-frequency switching capability due to the lower impurity concentration of 4H-SiC substrate that allowed this semiconductor material to attain high saturation velocity and mobility [6, 7]. Another potential appeal of using 4H-SiC as the semiconductor substrate was the ability to adopt the matured fabrication and packaging technologies developed for Si-based MOS devices to be employed in the development of 4H-SiC-based MOS devices [8].

Another captivating advantage of 4H-SiC, when compared with other compound semiconductors, is the ability to thermally grow high-quality native silicon dioxide (SiO₂) or nitrided SiO₂ as a passivation layer (PL), of which 4H-SiC-based MOS devices with nitrided SiO₂ has demonstrated low leakage current, as well as leveraging on the well-established fabrication process from Si-based MOS devices [9, 10]. Nevertheless, a challenge arose when using low dielectric constant (k) SiO₂ for the passivation for 4H-SiC-based MOS devices due to the breakdown of the device being caused by the low k value of SiO₂, hindering the complete exploitation of the high breakdown field strength possessed by 4H-SiC substrate [11]. Therefore, the alternative method of introducing high k material to be employed as a PL for 4H-SiC-based MOS devices has been carried out in full swing to address this issue, of which these 4H-SiC-based MOS devices would be able to sustain a high breakdown electric field as well as low leakage current density [7]. Currently, there exists a diverse range of advanced high k materials, including cerium oxide (CeO₂) [12], aluminum (Al) oxide (Al₂O₃) [13], zirconium oxide (ZrO₂) [14], and lanthanum oxide (La₂O₃) [15], which have been under consideration as potential substitutes for SiO₂ in the role of PL for MOS devices based on 4H-SiC [16]. Among the high k materials under scrutiny, CeO₂ stands out as a promising contender for supplanting SiO₂ as a PL, thanks to its appealing attributes of values of high k spanning from 10 to 16 [17, 18], wide bandgap spanning from 3.0 to 3.6 eV [17, 19], as well as large conduction band offset with respect to 4H-SiC substrate (1.60 eV) [20]. Likewise, the primary utilization of CeO₂ as a PL on Si-based MOS devices has shown a leakage current density reduction, leading to an enhancement in the electric breakdown field [21]. In order to emulate the success of Si-based MOS device with CeO₂ as PL, CeO₂ has been deposited as PL on 4H-SiC as well as AlGaN/GaN heterostructure, wherein CeO₂/4H-SiC MOS test structure has demonstrated a low leakage current density of 1.5 × 10⁻⁶ A/cm² at 3.5 MV/cm as well as low interface trap density (1 × 10¹² eV⁻¹ cm⁻²) [20] while CeO₂/AlGaN/GaN MOS test structure has revealed several magnitude reduction of leakage current density when compared with AlGaN/GaN test structure without CeO₂ PL [22].

Although CeO₂ PL has displayed superior passivating properties, the generation of V_o, in coupled with the reduction of Ce⁴⁺ to Ce³⁺ states, remains as a challenging issue to be tackled [23], wherein the generated Vo has induced gap states triggering the reduction of energy bandgap as well as acting as leakage current paths [24]. Moreover, the generation of oxygen vacancy sites in CeO₂ PL would act as a hopping site for the diffusion of oxygen ions to the interface [16], provoking the formation of low k SiO₂ and a low passivating quality CeO₂ for 4H-SiC [25] and GaN [26] substrates, respectively. In order to tackle these problems and enhance the passivating properties of CeO₂, an approach involving the doping of tetravalent cations, which include titanium (IV) (Ti⁴⁺) [27], hafnium (IV) (Hf⁴⁺), silicon (IV) (Si⁴⁺), and zirconium (IV) (Zr⁴⁺) [28] into CeO₂ crystal lattice has been explored. Unfortunately, this exploration has led to the generation of additional active V_o in CeO₂ PL as the doping of these tetravalent cations has stimulated the reducibility of Ce⁴⁺ to Ce³⁺ in which the detrimental effects of V_o have been explained in an earlier section [29]. Therefore, the attention was diverted toward the doping of trivalent cation (yttrium (III) (Y³⁺) [30], lanthanum (III) (La³⁺) [31], gadolinium (III) (Gd³⁺) [32], manganese (III) (Mn³⁺) [33]) into CeO₂ crystal lattice, wherein the reducibility to Ce³⁺ state was less likely to happen as a lower energy is required for the trivalent cation introduction into CeO₂ crystal lattice than the energy required to form oxygen vacancy [34, 35]. While the generation of V_o during the modification CeO₂ with trivalent dopant was unavoidable, studies have indicated that these vacancies tend to aggregate into defect clusters along with the trivalent cations, ultimately resulting in the inactivation of the V_o [36] that would retard the oxygen ions from using the V_o as a path to diffuse to interface [37].

Considering these literature reviews, a trivalent Ga³⁺ cation possessing an ionic radius (0.062 nm), which is smaller in comparison to the Ce⁴⁺ cation (0.097 nm), has been introduced into CeO₂ crystal lattice with the purpose of enhancing the inactivation of V_o, wherein the probability of forming inactive V_o with trivalent cations was dependent on the ionic radius of trivalent cations [38]. Hence, the introduction of trivalent Ga³⁺ cation in CeO₂ crystal lattice would assist in enhancing the passivating properties of ternary gallium cerium oxide (Ga_xCe_yO_z) by taking advantage on the excellent properties of Ga₂O₃, such as large bandgap (~4.9 eV) and moderate k value (~9) [39, 40]. It is important to note that the prior studies on Ga_xCe_yO_z PL were conducted exclusively by the same research group associated with the present work [16, 24, 29]. While earlier research provided a preliminary investigation of Ga³⁺ doped CeO₂ PL on 4 H-SiC, which is the only study on the Ga_xCe_yO_z PL deposited on 4H-SiC substrates at 800°C [40], this study represents the first comprehensive analysis of the structural, chemical, optical, and MOS characteristics of Ga_xCe_yO_z PL deposited on 4H-SiC substrates. Specifically, examination on the effects of postdeposition annealing at varying temperatures (600, 700, 800, and 900°C) in a nitrogen-oxygen–nitrogen (N₂–O₂–N₂) ambient, offering novel insights into the material’s behavior under these conditions, which has not been reported previously.

2. Experimental

The n-type 4H-SiC (0001) substrate was divided into 1 cm² sections, cleaned via the RCA process, and immersed in a diluted hydrofluoric acid solution to eliminate the native oxide layer, followed by a rinse with deionized water and drying with nitrogen gas. In the preparation of a gallium precursor with a concentration of 0.25 M, a precise procedure was executed wherein 0.319 g of gallium nitrate hydrate was meticulously dissolved in a volume of 5 ml of methanol, followed by an extensive stirring process conducted at a controlled temperature of 30°C for a duration of 15 min, ensuring the complete dissolution of the compound. Similarly, a cerium precursor of the same molarity, 0.25 M, was synthesized through the dissolution of 1.0936 g of cerium acetylacetonate hydrate in a carefully measured mixture of 3 ml of methanol and 6 ml of acetic acid, which was subsequently subjected to stirring at an elevated temperature of 60°C for an equivalent period of 15 min, thereby facilitating the formation of a homogenous solution. Following the successful preparation of both precursor solutions, the next step involved combining both solutions, which was accompanied by a vigorous stirring process maintained at 60°C for a total of 30 min, thereby ensuring thorough mixing and interaction of the components. Ultimately, the resulting mixture was applied onto a 4H-SiC substrate utilizing a spin-coating technique executed at a speed of 3000 rpm for a precise duration of 30 s, thereby achieving a uniform coating necessary for subsequent experimental procedures. Subsequently, postdeposition annealing was carried out at temperatures between 600 and 900°C in an N₂–O₂–N₂ ambient in a horizontal tube furnace. A gas flow rate of 100 ml/min was chosen in this work, while the heating-up rate was set to 10°C/min.

The crystal structure of the investigated Ga_xCe_yO_z PLs was analyzed using grazing incident X-ray diffraction (Bruker D8 Discover employing Cu k_α radiation (λ = 1.5406 Å)) operated at 40 kV and 40 mA with a scan range of 25°–62°, a step size of 0.05°, and a step time of 1.5 s. The chemical states of the investigated Ga_xCe_yO_z PL were characterized by X-ray photoelectron spectroscopy (XPS) (Axis Ultra DLD Kratos spectrometer) employing a monochromatic Al kα X-ray source (hv = 1486.6 eV) at 9 mA for emission and 10 kV for anode HV (high voltage). Additionally, an analysis area of 300 × 700 µm was utilized to characterize the investigated PL at a base pressure of 2.7 × 10⁻⁹ torr under an ultra-vacuum environment. The pass energy of the hemispherical analyzer was set at 160 eV for the wide scan and 20 eV for the high-resolution narrow scans at a take-off angle of 0°. It is noteworthy that all scans were carried out under charge neutralization conditions, utilizing a low-energy electron gun within the field magnetic lens to ascertain the elemental chemical states. The cross-sectional images and surface morphology were acquired using field-emission scanning electron microscopy (FESEM) (FEI Nova Nano SEM 450), while energy dispersive X-ray (EDX) spectra of the investigated samples were acquired using EDX spectroscopy (JSM-6460 LV). The acquired X-ray reflectivity (XRR; Bruker D8 Discover) measurements were used to estimate the thickness of the investigated Ga_xCe_yO_z PL as well as the SiO₂ interfacial layer (IL) through fitting the attained XRR curves adopting Bruker DIFFRAC Leptos (7.10.0.12) software. The atomic force microscopy (AFM; Dimension Edge, Bruker) in tapping mode was used to extract surface topographies and root–mean–square (RMS) roughness of the investigated Ga_xCe_yO_z PLs. The direct (E^D) and indirect (E^ID) bandgaps for the investigated Ga_xCe_yO_z PLs were extracted by analyzing ultraviolet–visible-near-infrared (UV–VIS-NIR) spectra acquired in the 190–1000 nm wavelength range via a UV–VIS-NIR spectrophotometer (Cary 5000) set up in diffused reflectance mode. The thermal evaporation (AUTO 306) technique was used to deposit Al contact with a diameter of 0.2 mm on the investigated Ga_xCe_yO_z PLs through a shadow mask while a blanket of Al was evaporated on the backside of 4H-SiC substrate. The capacitance–voltage (C–V) and conductance–voltage (G–V) characteristics for the Al/Ga_xCe_yO_z/4H-SiC/Al MOS test structure were measured using the Keithley 4200-SCS semiconductor parameter analyzer in which an applied voltage was swept from −6 to 8 V with a sweep rate of 30 mV/s while a variation of frequency (1 MHz–10 KHz) was employed. Subsequently, the current–voltage (I–V) measurements were carried out using a similar system.

3. Results and Discussion

Figure 1 presents GIXRD patterns of Ga_xCe_yO_z PL deposited on 4H-SiC substrates and annealed at 600–900°C in a controlled N₂–O₂–N₂ ambient. All Ga_xCe_yO_z PL exhibited a polycrystalline phase, with peaks corresponding to the (111), (200), (220), and (311) planes of the cubic fluorite CeO₂ structure (ICDD 00-034-0394). Notably, the (200) plane was absent in the 600°C annealed sample. Phase separation was ruled out, as no peaks corresponding to monoclinic (ICDD 00-041-1103) or cubic Ga₂O₃ (ICDD 00-020-0426) were observed. The absence of phase separation in the GIXRD analysis confirms the successful incorporation of Ga³⁺ into the CeO₂ lattice, forming a homogeneous solid solution. In the case of phase separation, random grain orientation leads to non-uniformity in the electrical characterization of the PL, which is undesirable [41]. Therefore, no phase separation in the present study is a significant advantage, as it ensures uniform dielectric properties, minimizes defect sites, and enhances interfacial quality with the 4H-SiC substrate. The single-phase structure contributes to improved electrical performance, including a higher effective dielectric constant, reduced leakage current, and better breakdown voltage, which are critical for high k PL applications. This homogeneity also underscores the thermodynamic stability of Ga³⁺ doped CeO₂ under the optimized processing conditions, further validating the robustness of the present approach. Further investigation has disclosed that all of the diffraction peaks were moved to a higher diffraction angle in comparison to the ICDD file no. 00-034-0394 denoting the incorporation of the trivalent Ga³⁺ cation with a smaller ionic radius (0.62 Å) than Ce⁴⁺ (0.97 Å) into the CeO₂ crystal lattice has been successful, aiding the formation of ternary Ga_xCe_yO_z phase.

Details are in the caption following the image — **Figure 1**
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GIXRD patterns of gallium cerium oxide (Ga_xCe_yO_z) passivation layer (PL) annealed in N₂–O₂–N₂ ambient at 600, 700, 800 [40], and 900°C.

The modification of the CeO₂ crystal lattice with the introduction of Ga³⁺ cation would trigger an alteration in the crystal lattice parameters (a). The a values were determined using the following equation [42]:

(1)

(2)

where d_hkl, θ, and (hkl) are the interplanar spacing, diffraction angle, and Miller’s index, respectively. Figure 2 depicts the computed a values wherein it was noticed that all of the studied Ga_xCe_yO_z PL exhibited crystal lattice contraction in comparison to standard CeO₂ (a = 0.5411 nm). This supported the notion that Ga³⁺ ions, which have a smaller ionic radius than Ce⁴⁺ ions, were successfully incorporated into the CeO₂ crystal lattice, forming the Ga_xCe_yO_z phase. Besides, a sudden reduction in the a value was observed as the annealing temperature was increased from 600 to 700°C. This observation suggested the generation of a higher concentration of V_o at this temperature, leading to the smallest a value among the investigated PL. As the annealing temperature underwent a transition to reach the elevated value of 700°C, it was anticipated that this alteration in thermal conditions would consequently facilitate the movement and migration of a significantly greater quantity of nitrogen ions within the Ga_xCe_yO_z PL. It is possible that these nitrogen ions have a higher likelihood of diffusing toward the region of Ga_xCe_yO_z PL compared to the interface [16]. Hence, the nitrogen ions located at the region of Ga_xCe_yO_z PL have formed an attachment with the V_o in the Ga_xCe_yO_z crystal lattice, wherein charge neutrality of the Ga_xCe_yO_z crystal lattice was achieved through the release of adjacent oxygen ions. As a result, newly formed Vo were being introduced into the Ga_xCe_yO_z crystal lattice subjected to annealing at 700°C, aiding the attainment of a smaller a value in comparison to Ga_xCe_yO_z PL annealed at 600°C. The above statement could be further supported by the obtained EDX results (Table 1), which has revealed that the atomic percentage (at%) of nitrogen was changed from 6.04 to 9.30 at% at 700°C.

Table 1. The constituent elements extracted from the EDX measurements for the Ga_xCe_yO_z PL.

Annealing temperatures (°C)	O (at. %)	Ce (at. %)	Ga (at. %)	N (at. %)
600	60.57	20.43	12.96	6.04
700	59.39	21.02	10.28	9.30
800	61.72	20.15	8.78	9.35
900	65.59	18.02	8.70	7.69

Upon elevating the postdeposition annealing temperature to 800°C, a marginal increase in the nitrogen content was recorded, reaching a level of 9.35 at%, which indicates a heightened diffusion phenomenon of nitrogen ions into the Ga_xCe_yO_z PL. The application of a significantly elevated annealing temperature of 800°C has provided an augmented amount of thermal energy, thereby facilitating a more pronounced influx of nitrogen ions that are capable of migrating toward the critical interface region that exists between the Ga_xCe_yO_z PL and the underlying 4H-SiC substrate. Consequently, this scenario has led to a diminished probability of nitrogen ions persisting within the Ga_xCe_yO_z crystalline lattice structure when compared to the interface. Therefore, the nitrogen ions that have gathered in proximity to the interface region have established bonds with the dangling bonds of silicon and/or carbon [43], which in turn has effectively hindered the reactive interactions between oxygen ions and the surface of 4H-SiC, thereby serving to reduce the formation of SiO₂ IL. Therefore, the oxygen ions have diffused outward, consequently increasing the probability of oxygen ions being attached to the V_o site in the Ga_xCe_yO_z crystal lattice while undergoing annealing at 800°C, resulting in lattice expansion. However, a reduction in a was attained at a maximum annealing temperature of 900°C. The abrupt decrease in a value observed at 900°C may be attributed to the oxygen ions acquiring adequate energy to disrupt the bonding of nitrogen ions with the Si and/or C dangling bonds [16], wherein these nitrogen ions have diffused outward from the Ga_xCe_yO_z PL contributing to the reduction in at% of nitrogen (7.69 at%). The disruption of the attachment between nitrogen ions and the dangling bonds of Si and/or C while annealing to 900°C could also be reinforced by reaching the maximum at% of oxygen, allowing oxygen ions with adequate energy to diffuse into the Ga_xCe_yO_z PL to disrupt these attachments.

The cross-sectional FESEM images of the investigated Ga_xCe_yO_z PLs were presented in Figure 3, as the information related to the average total oxide thickness of the investigated PLs was extracted from 10 different locations using ImageJ software (Table 2). It was noticed that the Ga_xCe_yO_z PLs were undergoing a densification process when postdeposition annealing was carried out from 600 to 800°C as the measured average total oxide thickness ranging from 71.0 to 45.7 nm was lower than the average total oxide thickness of the as-deposited Ga_xCe_yO_z PL (186.2 nm) [40]. This observation has suggested that during postdeposition annealing from 600 to 800°C, oxygen ions could be filling the V_o in the Ga_xCe_yO_z crystal lattice as well as the removal of defects that would aid in the densification of the Ga_xCe_yO_z PL [44]. At 700°C, the Ga_xCe_yO_z PL exhibited a higher concentration of newly formed oxygen vacancies (V_o), resulting in less pronounced densification compared to the Ga_xCe_yO_z PL at 800°C. However, at 900°C, the average total oxide thickness showed a slight increase to 47.4 nm, compared to 45.7 nm for the Ga_xCe_yO_z PL annealed at 800°C. The increase in oxide thickness during postdeposition annealing at 900°C indicates that the formation of a SiO₂ IL was more significant at this temperature, while it is suggested that SiO₂ IL formation may be less prominent at or below 800°C.

Table 2. The estimated thicknesses of Ga_xCe_yO_z PL and SiO₂ IL from XRR measurements as total oxide thickness of Ga_xCe_yO_z PL extracted from XRR as well as cross-sectional FESEM measurements.

Annealing temperature (°C)	XRR: Ga_xCe_yO_z thickness (nm)	XRR: SiO₂ thickness (nm)	XRR: total oxide thickness (nm)	Cross-sectional FESEM: total oxide thickness (nm)
600	74.128	1.466	75.594	71.0
700	56.143	2.976	59.119	58.4
800	44.378 [40]	3.258 [40]	47.636 [40]	45.7 [40]
900	43.921	4.723	48.644	47.4

XRR measurements were employed to assist in evaluating trends in film density and the presence of a SiO₂ IL in Ga_xCe_yO_z PL at various postdeposition annealing temperatures. The experimental and fitted XRR curve for the Ga_xCe_yO_z PL annealed at 900°C is shown in the inset of Figure 2. Table 2 summarizes the thickness of the Ga_xCe_yO_z PL and SiO₂ IL across different annealing temperatures. The XRR results provided a clearer view, revealing that as the postdeposition annealing temperature increased from 600°C to 900°C, the Ga_xCe_yO_z PL thickness reduced from 74.128 to 43.921 nm, indicating densification. Additionally, the thickness of the SiO₂ IL increased from 1.466 to 4.723 nm with increasing annealing temperature, suggesting that higher oxygen ion diffusivity to the interface was temperature-dependent. Table 2 shows a significant variation in SiO₂ IL thickness (1.510 nm) as the temperature switched to 700°C from 600°C, consistent with earlier explanations that nitrogen ions accumulate in the Ga_xCe_yO_z PL region, forming bonds with V_o [16]. This leads to oxygen ions released during nitrogen attachment with V_o, along with inward-diffusing oxygen ions during the dwelling stage, diffusing to the interface and reacting with the 4H-SiC surface, promoting SiO₂ IL formation. In contrast, SiO₂ IL formation slowed down at 800°C, likely due to nitrogen ion migration to the interface. The nitrogen ions at the interface act as a barrier, preventing oxygen ions from reacting with the 4H-SiC surface, resulting in a smaller SiO₂ IL thickness variation (0.282 nm) when the temperature increased from 700 to 800°C. The nitrogen ions’ effectiveness in limiting SiO₂ IL formation diminished at 900°C, where a larger variation in SiO₂ IL thickness (1.465 nm) was observed between the samples annealed at 800 and 900°C. This increase in SiO₂ IL thickness suggested that oxygen ions had enough energy to break nitrogen bonds with the Si and/or C dangling bonds, allowing oxygen ions to react with the 4H-SiC surface. While SiO₂ IL formation intensified at 900°C, the use of the Ga_xCe_yO_z PL on the 4H-SiC substrate effectively controlled SiO₂ IL thickness (4.723 nm) compared to Ga_xCe_yO_z (24.239 nm) [29] and CeO₂ (40.194 nm) [17] PLs deposited on Si substrates subjected to similar annealing conditions.

In an effort to determine and accurately extract the crystallite size (D), as well as the microstrain (ε), of the Ga_xCe_yO_z PL that were subjected to various annealing temperatures in N₂–O₂–N₂ ambient, the well-established Williamson–Hall (W–H) method was employed, which can be succinctly articulated through the equation that follows [45]:

(3)

where λ, θ_i, β_i are X-rays source wavelength (λ = 1.5406 Å), diffraction angle of the (hkl) diffraction peak, and integral breadth (in radius 2θ) of the ith Bragg reflection positioned at 2θ_i. The typical W–H plot for the Ga_xCe_yO_z PL annealed at 900°C subjected to linear fitting (Figure 4) to ascertain the slope and intercept necessary for the determination of ε and D, respectively, with the resultant values illustrated in Figure 5. As a whole, it was noticed that the values of D were enhanced with respect to annealing temperatures, indicating that the smaller crystallites were undergoing a coalescence process to form larger crystallites. Among all the examined samples, it was observed that the minimal increase in D was achieved when the annealing temperature was elevated from 600 to 700°C. The rationale behind this observation may be attributed to the migration of a significant concentration of nitrogen ions toward the Ga_xCe_yO_z PL region at 700°C, where the presence of excess nitrogen ions has impeded the coalescence of crystallites. Additionally, the attachment of nitrogen ions to the V_o in Ga_xCe_yO_z crystal lattice contributing to the release of oxygen ions as well as the attachment of trivalent Ga³⁺ cation with the V_o to form Ga³⁺–V_o defect pairs [34] have slowed down the coalescence process of forming larger crystallites. Hence, it was noticed that the largest compressive ε was induced on the Ga_xCe_yO_z PL annealed at 700°C due to the highest concentration of nitrogen ions accumulated at the region of PL, attachment of nitrogen ions to V_o, formation of new V_o, as well as formation of Ga³⁺–V_o defect pairs. As the annealing temperature increased to 800°C, a reduction in compressive strain (ε) in the Ga_xCe_yO_z passivation layer (PL) promoted the growth of larger domains (D). This effect might be attributed to the accumulation of a higher concentration of nitrogen ions at the interface, which likely hindered the diffusion or reaction of oxygen ions with the 4H-SiC surface. Hence, these unreacted oxygen ions might have diffused outward and occupied the V_o in the Ga_xCe_yO_z crystal lattice to assist in the coalescence process of forming larger crystallites. Nonetheless, a substantial increment in D was discerned at the maximum temperature of 900°C was being utilized. Therefore, it was presumed that a higher concentration of oxygen ions has diffused into this Ga_xCe_yO_z PL with higher energy at 900°C, of which the oxygen ions may knock off the nitrogen ions attached to V_o in Ga_xCe_yO_z crystal lattice as well as breaking the attachment of nitrogen ions with the Si and/or C dangling bonds. Consequently, the inward diffusing oxygen ions could occupy the V_o being formed from the knockoff of nitrogen ions attached to V_o in Ga_xCe_yO_z that would assist in the formation of the largest D as well as the generation of tensile ε being induced on the Ga_xCe_yO_z PL annealed at 900°C. A comparable trend of increasing microstrain with increasing crystallite size has been previously reported in studies involving Ce-doped CuO thin films [46].

Figure 6 delineates the overarching mechanism that transpires within the Ga_xCe_yO_z/4H-SiC system. Initially, Ga³⁺ cations are posited to occupy the Ce⁴⁺ sites within the CeO₂ lattice, thereby facilitating the formation of Ga_xCe_yO_z PL material while concomitantly generating V_o to achieve charge neutrality (Figure 6a). During the annealing process, with the infusion of nitrogen ions (N³⁻), a portion of these nitrogen ions is hypothesized to interact with the vacancies, while others may migrate to the interface to form bonds with silicon and/or carbon dangling bonds (Figure 6b). At the comparatively lower temperature of 600°C, it was noted that the N³⁻ ions predominantly occupied the available V_o sites within the Ga_xCe_yO_z PL. As the temperature was elevated to 700°C, the propensity for N³⁻ ions to diffuse toward the interface increased. Simultaneously, the binding of N³⁻ ions to the V_o resulted in the liberation of additional O²⁻ ions, thereby generating more V_o to maintain charge equilibrium (Figure 6c). The liberated oxygen ions may either migrate to the interface to form a SiO₂ IL or diffuse out of the PL. The application of a higher thermal treatment at 800°C has imparted a heightened amount of thermal energy, consequently promoting a more significant influx of nitrogen ions capable of traversing toward the critical interface region that exists between the Ga_xCe_yO_z PL and the underlying 4H-SiC substrate. This phenomenon has consequently resulted in a reduced likelihood of nitrogen ions remaining within the Ga_xCe_yO_z crystalline lattice structure in contrast to their presence at the interface. Hence, the nitrogen ions that have concentrated near the interface region have formed bonds with the dangling bonds of silicon and/or carbon, thereby effectively obstructing the reactive interactions between oxygen ions and the surface of 4H-SiC, which in turn has mitigated the formation of the SiO₂ IL. Consequently, the oxygen ions have diffused outward, thereby augmenting the likelihood of oxygen ions attaching to V_o sites (Figure 6d) in the Ga_xCe_yO_z crystal lattice during the annealing process at 800°C. However, at 900°C, the oxygen ions acquired sufficient energy to disrupt the bonding interactions between nitrogen ions and the silicon and/or carbon dangling bonds (Figure 6e), resulting in the outward diffusion of these nitrogen ions from the Ga_xCe_yO_z PL. Furthermore, these oxygen ions have also accelerated the passivation of vacancies, facilitating the reoxidation of Ce³⁺ to Ce⁴⁺ at the temperature of 900°C.

A further analysis on the formation of Ga_xCe_yO_z PLs on 4H-SiC substrate has been carried out by extracting the direct (E^D) and indirect (E^ID) bandgaps of these samples based on attained UV–VIS spectra. The acquired UV–VIS results were modeled using the Kubelka–Munk (KM) function, as expressed below [47]:

(4)

where R is regarded as the diffuse reflectance, with the F (R) function being scaled by hv, employing 1/2 and 2 as the respective coefficients (n) for direct-band and indirect-band optical transitions. The E^D and E^ID values were computed as per (F (R) x hv)² vs. hv and (F (R) x hv)^1/2 vs. hv plots, respectively, via extrapolation of the linear region to zero (not shown) and are presented in Figure 7. The deduction from Figure 7 that the extracted E^D and E^ID values within the range of 3.83–3.91 eV as well as 2.74–3.10 eV, respectively, for the Ga_xCe_yO_z PLs annealed at 800 and 900°C were lies in the range of the reported E^D (4.85 eV) and E^ID (4.66 eV) for Ga₂O₃ as well as E^D (3.12 eV) and E^ID (2.58 eV) for CeO₂ [29]. These results have further complimented the other reported results in this work that the modification of CeO₂ crystal lattice with Ga³⁺ cations has been attained by the formation of Ga_xCe_yO_z PLs [16]. Nonetheless, it was noticed that a smaller E^D (3.60–3.75 eV) and E^ID (2.15–2.22 eV) values were obtained by the PLs annealed at 600 and 700°C, which could be related to either the attachment of a higher concentration of nitrogen ions to the V_o or/and the existence of a higher concentration of the V_o in Ga_xCe_yO_z crystal lattice. A similar observation of bandgap narrowing due to oxygen vacancy-induced gap states was observed for the HfO₂ PL on the 4H-SiC semiconductor [48]. Additionally, it should be noted that the doping of a higher at% nitrogen ion for the Ga_xCe_yO_z PL annealed at 700°C has introduced N 2p states that have contributed to the narrowing of bandgap through the raising of valance band maximum [49]. Although the EDX analysis disclosed the acquisition of a slightly higher at% of nitrogen ions by the Ga_xCe_yO_z PL annealed at 800°C than that of 700°C, the acquisition of larger E^D and E^ID values for the sample annealed at 800°C has further supported the fact that a higher concentration of nitrogen ions were being diffused to the region of interface between Ga_xCe_yO_z PL and 4H-SiC substrate. Hence, the influence of nitrogen ions attaching to the V_o of the Ga_xCe_yO_z crystal lattice toward the narrowing of E^D and E^ID was less significant when the Ga_xCe_yO_z PLs were subjected to annealing at 800°C when compared with 700°C.

Figure 8e shows the typical FESEM surface morphology of the investigated Ga_xCe_yO_z PL that was annealed at 900°C. It was noticed that the surface of all Ga_xCe_yO_z PLs was smooth without observable cracks or voids. AFM characterization was employed to obtain the 3-dimensional surface topographies of the investigated PLs, as presented in Figure 8. The 3-dimensional surface topography (Figure 8a) for the Ga_xCe_yO_z PL annealed at 600°C has disclosed the formation of smaller dimension protrusions with random distribution throughout the surface of Ga_xCe_yO_z PL. As the annealing temperature was increased to 700 (Figure 8b) and 800°C (Figure 8c), the distribution of protrusions was more uniform with a vertical growth of protrusions on the surface of this Ga_xCe_yO_z PL. With the employment of a maximum temperature of 900°C, the migration of more oxygen ions toward the region of Ga_xCe_yO_z PL has further stimulated the growth of protrusions, wherein the formation of the larger dimension of protrusions was observed in Figure 8d. As a whole, the RMS roughness values were enhanced from 0.94 to 2.53 nm with respect to annealing temperatures (Figure 8).

Figure 9 presents the leakage current density-electric field (J–E) characteristics of the Ga_xCe_yO_z PLs annealed at different temperatures in N₂–O₂–N₂ ambient. As a whole, it was noticed that the Ga_xCe_yO_z PLs annealed at 800 and 900°C have demonstrated higher electric breakdown field (E_B) of 2.95 and 5.58 MV/cm, respectively, when compared with the Ga_xCe_yO_z PLs annealed at 600 (0.51 MV/cm) and 700°C (1.06 MV/cm). A substantial improvement in the E_B for Ga_xCe_yO_z PLs annealed at 800 and 900°C could be related to the existence of a lower density of defects with regards to V_o, wherein the attainment of larger E^D and E^ID when compared with Ga_xCe_yO_z PLs annealed at 600 and 700°C has suggested that a higher concentration of oxygen ions have occupied the V_o within the Ga_xCe_yO_z lattice, aiding the reduction of the density of defects. Moreover, the employment of annealing at 700°C has offered an adequate amount of energy for more nitrogen ions to diffuse to the region of Ga_xCe_yO_z PL in which these nitrogen ions would either attach to the V_o, contributing to the formation of new V_o to achieve charge neutrality or the unbonded nitrogen ions lingering at the region of Ga_xCe_yO_z PL. As a consequence, the Ga_xCe_yO_z PL subjected to annealing at 700°C has demonstrated a poorer J–E characteristic than Ga_xCe_yO_z PL annealed at/beyond 800°C due to the narrowing of E^D and E^ID as a result of nitrogen ions attached to the V_o in Ga_xCe_yO_z crystal lattice as well as the presence of negatively charged defects, namely, unbonded nitrogen ions in the region of Ga_xCe_yO_z PL that would act as scattering center for the injected electrons to break the bonding of Ga_xCe_yO_z when E was being applied. Of these investigated samples, the Ga_xCe_yO_z PL annealed at 600°C has demonstrated the poorest J–E characteristic due to the acquisition of the lower at% nitrogen as disclosed by EDX (Table 1), wherein the probability of incorporated nitrogen attaching to V_o and migrating toward the interface to passivate Si and/or C dangling bonds [16] was the lowest amongst the investigated Ga_xCe_yO_z PL.

Although XRR measurements have revealed the formation of thicker low k SiO₂ IL for the Ga_xCe_yO_z PLs annealed at 800 and 900°C, the detrimental effects caused by this low k SiO₂ IL could be minimal as better J–E characteristics have been displayed by these two samples when compared with samples annealed at lower temperatures. The capacitance–voltage (C–V) measurements at the frequency of 1 MHz were carried out by sweeping the gate voltage from −6 to +8 V, as presented in Figure 10, to assess the influence of SiO₂ IL formation toward the k values of the investigated Ga_xCe_yO_z PL. Based on the attained C–V curves, the k values were calculated using the following equation [50]:

(5)

where C_ox, t_ox, ε_o, and A indicate the accumulation level capacitance, total oxide thickness, permittivity of free space, and area of metal contact, respectively. The estimated k values at varying annealing temperatures are depicted in Figure 11. It was determined that the Ga_xCe_yO_z PL annealed at 600°C obtained an appreciably low k value of 4.43, which was in agreement with the earlier explanation that the highest density of defects was formed in this PL contributing to the attainment of the lowest E_B and the highest J. When the Ga_xCe_yO_z PL were subjected to annealing temperature at/beyond 700°C, a substantial increment in k values was noticed even though XRR measurements have revealed the formation of thicker SiO₂ IL with respect to annealing temperature. It is plausible to infer that the development of low k SiO₂ IL may have a minimal impact on the overall k value of the Ga_xCe_yO_z PL that were subjected to annealing processes within the temperature range of 700–900°C in N₂–O₂–N₂ ambient. The underlying rationale that leads to the observation of a comparatively lower k value of 19.85 for the Ga_xCe_yO_z at 700°C, especially when juxtaposed with the outcomes observed at elevated annealing temperatures, can be attributed to the accumulation of nitrogen ions within the region of the Ga_xCe_yO_z PL; this accumulation facilitates the interaction and bonding of nitrogen ions with V_o, ultimately resulting in the creation of additional V_o states. Since more nitrogen ions were diffused to the interface between Ga_xCe_yO_z PL and 4H-SiC substrate at 800°C, the inward diffusing oxygen ions would be able to occupy the V_o in Ga_xCe_yO_z to reduce the density of defects in this PL leading to the attainment of a higher k value of 24.11. A slight reduction in the k value, quantified at 0.1, was recorded when the annealing temperature was elevated from 800 to 900°C; this finding is particularly intriguing given that the XRR measurements have indicated the presence of a more pronounced variability in the thickness of the SiO₂ IL, which measured ~1.464 nm for the two distinct samples in question. This particular observation strongly suggested that the development of a thicker SiO₂ IL at the elevated annealing temperature of 900°C exerts a negligible influence on the k value as well as the J–E characteristics of this specific PL.

It is worth mentioning the Ga_xCe_yO_z PLs annealed at 800 and 900°C have demonstrated superior J–E characteristics as well as k values, and of which further investigation on the chemical composition present in these PLs was conducted using XPS characterization. Figure 12 presents the survey spectrum obtained for the Ga_xCe_yO_z PLs annealed at 800 and 900°C. Based on this, the XPS peaks corresponding to Ce 3d, O 1s, Ga 3d, and N 1s were identified and are shown in Figure 13. The XPS peaks were calibrated based on the C 1s peak located at 284.6 eV for the Ga_xCe_yO_z PL annealed at 800 and 900°C. Deconvolution of a well-resolved spectrum of the Ce 3d core level at an energy range of 870–930 eV resulted in the identification of six distinct peaks, as depicted in Figure 13a. It was noted that the Ga_xCe_yO_z PL, subjected to annealing temperatures of 800 and 900°C, yielded Ce⁴⁺⁻related peaks at energies of 887.6 (v″), 897.7 (v‴), 900.3 (u), 905.6 (u″), and 916.1 eV (u‴), as well as 887.7, 897.8, 900.5, 906.8, and 916.3 eV, respectively. The Ce⁴⁺ states have been discerned by examining the emission originating from the Ce 3d_5/2 (v″ and v‴) as well as the emission originating from the Ce 3d_3/2 core levels (u, u″, and u‴) [51]. Moreover, the Ce³⁺-related peak was detected at 882.2 (V_o) and 882.3 (V_o) originating from s annealed at 800 and 900°C, respectively. Although the detection of Ce³⁺ states suggested the formation of V_o was accompanied by the reduction of Ce⁴⁺ to Ce³⁺, the detection of only one peak for the investigated samples suggested that the concentration of V_o was minimal at these temperatures. Moreover, shifting toward the lower binding energy for all of the peaks as compared to the reported peak position related to the Ce 3d core spectra suggested the successful doping of a trivalent Ga³⁺ cation into the CeO₂ crystal lattice to form the Ga_xCe_yO_z PL [52, 53]. In addition, shifting in the position of identified peaks toward higher binding energy was witnessed as the annealing temperature was increased from 800 to 900°C. This observation suggested the reoxidation of the Ce³⁺ to the Ce⁴⁺ state has taken place at 900°C by releasing electrons from the Ce state [54]. The aforementioned observation aligned with the preceding explanation that a higher concentration of oxygen ions was incorporated into the Ga_xCe_yO_z PL at 900°C. In this context, the incorporated oxygen ions could not only diffuse to the interface but also passivate V_o, consequently leading to the possibility of reoxidation from the Ce³⁺ to Ce⁴⁺ state.

Further clarity was obtained by deconvoluting O 1s spectra for the Ga_xCe_yO_z PL annealed at 800 and 900°C, and the resulting spectra are shown in Figure 13b. It is well known that the O 1s spectra peak is related to low energy (O_L), mid energy (O_M), and high energy (O_H) ascribed to crystal lattice oxygen, Vo, and adsorbed oxygen, respectively [55]. Consequently, the O_L peaks of 529.3 and 529.1 for the Ga_xCe_yO_z PL at 800 and 900°C, respectively, were ascribed to Ga–Ce–O–N bonding [56]. Moreover, the O_M peak for the Ga_xCe_yO_z PL at 800 (531.9 eV) and 900°C (530.8 and 531.2 eV) was related to the Vo induced by the formation of Ga–Ce–O bonding or N–V_o or Ga–V_o defect cluster. The presence of an additional O_M peak for the Ga_xCe_yO_z PL at 900°C suggested that the incoming oxygen ions have gained sufficient energy to break the nitrogen attachment with the Si and/or C dangling bonds, wherein some of the released nitrogen ions could have diffused inwards toward the region of the Ga_xCe_yO_z PL to form an attachment with the V_o. The shifting in binding energies to lower values that were observed with the increase in annealing temperature from 800 to 900°C provides additional verification for the preceding assertion that the conversion of Ce³⁺ to Ce⁴⁺ through reoxidation has been accomplished at 900°C. Consequently, the liberated electron from the Ce state would be captured by the O state, resulting in a decrease in binding energy. In addition, the O_H peaks at 532.8 and 532.1 eV for the Ga_xCe_yO_z PL annealed at 800 and 900°C, respectively, were related to the additional oxygen ions in the interstitial positions [57].

Additional information on the formation of the Ga_xCe_yO_z phase was attained through the acquisition of Ga 3d (Figure 13c) spectra, wherein sharp peaks related to Ga–Ce–O–N bonding were observed for the Ga_xCe_yO_z PL annealed at 800°C (19.9 eV) and 900°C (19.8 eV). The peaks at 19.9 (800°C) and 19.8 eV (900°C) could be arising from the Ga 3d_5/2 core level, while the peaks at 24.4 and 23.1 eV were due to Ga 3d_3/2 core level emission suggesting the presence of Ga³⁺ states in the PL [58]. The peaks at 19.9 and 19.8 eV binding energies for the Ga_xCe_yO_z PL at 800 and 900°C were ascribed to Ga–Ce–O–N bonding as it was within the range of reported Ga–N (19.6 eV) [59] and Ga–O (21.9 eV) [60] bonding positions. Moreover, the peaks of 24.4 and 23.1 eV for the Ga_xCe_yO_z PL at 800 and 900°C, respectively, were attributed to the formation of Ga–Ce–O bonding, wherein the lower binding energy observed for the sample at 900°C further supported that reoxidation of Ce³⁺ to Ce⁴⁺ occurred at 900°C, improving the passivating characteristics of the Ga_xCe_yO_z PL (Table 1). In addition, it should be noted that, as no phase separation was detected by the GIXRD (Figure 1), the XPS analysis further supported the idea that Ga³⁺ could be mainly residing at Ga_Ce sites at the CeO₂ crystal lattice, leading to the formation of the Ga_xCe_yO_z phase. The presence of a low-intensity peak at 17.1 and 17.9 eV in the Ga_xCe_yO_z PL provided evidence for the existence of the Ga–V_o defect cluster [61]. The N 1 s spectra were deconvoluted, revealing the emergence of two distinct peaks, as illustrated in Figure 13d, where one prominent peak was observed at energy levels of 396.8 eV and 396.5 eV for the Ga_xCe_yO_z PL annealed at a temperature of 800 and 900°C, respectively, thereby providing further corroborative evidence for the incorporation of nitrogen within the crystalline lattice structure of CeO₂. It has been previously documented in the literature that the specific bonding positions associated with the N 1s spectra for N–O, Ce–N, and Ga–N, which have been identified at binding energies of 393.7 [62], 396.1 [63], and 397.3 eV [63], respectively, according to prior studies. Hence, 396.8 and 396.5 can be ascribed to the Ga–Ce–O–N bonding. Moreover, the relatively low-intensity peak observed at 402.4 and 401.1 at 800 and 900°C, respectively, could be due to the attachment of nitrogen to the oxygen vacancy site, leading to the formation of N–V_o bonding or V_o states resulted from the breaking of the attachment [64].

By referring to the C–V curves presented in Figure 10, a positive flat band voltage shift (∆V_FB) was observed for all samples, suggesting the presence of negatively charged traps in the investigated Ga_xCe_yO_z PL. The quantity of negatively charged traps present in the investigated Ga_xCe_yO_z PL could be estimated by determining the effective oxide charge (Q_eff) using the following equation [65]:

(6)

where q represents the charge of electron. The computed Q_eff in the present work is shown in Figure 14. The acquisition of the lowest magnitude of negative Q_eff value for the Ga_xCe_yO_z PL annealed at 600°C has further reinforced that a lower concentration of negatively charged nitrogen ions have diffused into the region of Ga_xCe_yO_z PLs, wherein EDX characterization has revealed attainment of the lowest at% of nitrogen. When the annealing temperature was enhanced to 700°C, the migration of a higher concentration of negatively charged nitrogen ions to the region of Ga_xCe_yO_z PL have contributed to the attainment of a higher magnitude of negative Q_eff value than that of the Ga_xCe_yO_z PL annealed at 600°C. Although the EDX measurements have revealed that a minute variation in the at% of nitrogen for both Ga_xCe_yO_z PLs annealed at 700 (9.30 at%) and 800°C (9.35 at%) was obtained, a substantial increment in the magnitude of negative Q_eff value from −6.82 × 10¹¹ to −17.29 × 10¹¹ cm⁻² has further reinforced the earlier explanation that the increment of annealing temperature to 800°C has stimulated the migration of more nitrogen ions to the region of interface between Ga_xCe_yO_z PL and 4H-SiC substrate. Another plausible explanation that may elucidate the phenomenon leading to the observation of the most pronounced Q_eff value for the Ga_xCe_yO_z PL that has undergone annealing at a temperature of 800°C could very well be associated with the accumulation of nitrogen ions at the interface, which, in turn, functions as an effective barrier layer that serves to significantly mitigate the potential for oxygen ions to engage in reactive interactions with the surface of the 4H-SiC substrate. Hence, these unreacted oxygen ions would diffuse outward to occupy the positively charged V_o in the Ga_xCe_yO_z crystal lattice leading to the existence of more negatively charged traps in the. Nonetheless, a sudden reduction in the magnitude of negative Q_eff value was perceived when the highest annealing temperature of 900°C was being utilized. The reason contributing to the reduction of negative Q_eff value could be related to the oxygen ions gaining sufficient energy to knock off the nitrogen ions attached to the V_o in the Ga_xCe_yO_z crystal lattice, followed by these oxygen ions occupying these V_o. In addition to the aforementioned observations, it is noteworthy that the migration of oxygen ions toward the interface at a temperature of 900°C was not only capable of disrupting the nitrogen barrier layer but also facilitated the diffusion of negatively charged nitrogen ions away from the Ga_xCe_yO_z photoluminescent layer, as evidenced by the significant reduction in the at% of nitrogen, which decreased to 7.69 at%, thereby contributing to the realization of a notably lower magnitude of the Q_eff, when compared to the Ga_xCe_yO_z PL that underwent annealing processes at the lower temperatures of 700 and 800°C.

It was evident from the C–V curves (Figure 10) that when measurements were being swept from negative voltage to positive voltage and vice versa, hysteresis was observed for all of the investigated Ga_xCe_yO_z PL, indicating the existence of slow trap density (STD), which could be estimated using the following equation [66]:

(7)

where ΔV is the difference between forward and reverse bias flatband voltage. The estimated STD values for the investigated Ga_xCe_yO_z PLs are depicted in Figure 14. It was noticed that the Ga_xCe_yO_z PLs annealed at 600 and 700°C have attained lower STD, although the C–V curves for both PLs have demonstrated a clockwise hysteresis denoting the presence of scattering center in these samples. Although scattering centers were present in these Ga_xCe_yO_z PLs annealed at 600 and 700°C, acquisition of the lowest STD has implied that the scattering center might be located near to the interface, wherein the injected electrons from 4H-SiC semiconductor during forward bias were being scattered further away from the interface. Hence, a lower density of electrons was being trapped during forward bias for the Ga_xCe_yO_z PLs annealed at 600 and 700°C resulting in the acquisition of a lower STD as a lower density of trapped electrons was available to be detrapped during reverse bias when compared with the Ga_xCe_yO_z PLs annealed at 800 and 900°C. Moreover, it was distinguished that anticlockwise hysteresis was acquired by the Ga_xCe_yO_z PLs annealed at 800 and 900°C signifying the presence of a lower density of scattering center in which more electrons were being trapped at the location nearer to the interface during forward bias. When reverse bias was being applied, the probability of these trapped electrons were being detrapped would be higher, and thus, a higher STD was attained by the Ga_xCe_yO_z PLs annealed at 800 and 900°C when compared with samples annealed at lower annealing temperatures. Another possible reason for the Ga_xCe_yO_z PL annealed at 900°C to attain a higher STD than 800°C due to the breaking of the nitrogen barrier layer near to the interface in which more traps are available at the interface to trap and detrap the electrons injected from the 4H-SiC substrate during forward and reverse bias, respectively.

A further evaluation on the formation of traps in determining interface quality was carried out employing Terman’s method, in which the equation mentioned below was used to calculate the interface trap density (D_it) for the Ga_xCe_yO_z PL [67]:

(8)

where ΔV_g = V_g–V_{g (ideal)} is the voltage difference between the experimental (V_g) and the ideal C–V curves as well as Φ_s is the surface potential at a desired gate voltage. The derived D_it values, as a function of the energy trap level (E_c–E_t), are illustrated in Figure 15. The Ga_xCe_yO_z PL annealed at 600°C has shown the best interface quality in terms of lower D_it, which was consistent with the obtained Q_eff value. This observation further suggested that the doping of nitrogen into the region, as well as the interface at this temperature, was minimal. Hence, the possibility of unbonded nitrogen acting as a trap center was minimized at this temperature, leading to the acquisition of the lowest D_it. Nonetheless, it was found that close to the conduction band edge (E_c–E_t at 0.2 eV), the Ga_xCe_yO_z PL annealed at 900°C has acquired better interface quality in terms of lower D_it as compared to samples annealed at 700 and 800°C. This observation might suggest that the accumulated nitrogen ions at the interface have effectively passivated the Si and/or C dangling bonds located in close proximity to the conduction band edge, thereby aiding in the reduction of D_it at this temperature. Furthermore, as previously elucidated, the oxygen ions entering the Ga_xCe_yO_z crystal lattice might have attained sufficient energy at this temperature to occupy the oxygen vacancy sites, leading to the reoxidation of Ce³⁺ to Ce⁴⁺. Therefore, the coexistence of oxygen ions occupying the Vo in conjunction with the reoxidation of the Ce³⁺ to Ce⁴⁺ state and nitrogen ions passivating the dangling bonds of Si and/or C has contributed to the observation of a reduced D_it for the Ga_xCe_yO_z PL at 900°C compared to 700 and 800°C, in close proximity to the conduction band edge. Although the Ga_xCe_yO_z PL at 800°C has acquired a higher concentration of nitrogen ions at the interface to passivate Si and/or C dangling bonds, the incoming oxygen ions could not gain sufficient energy to occupy the oxygen vacancy sites that were close to the conduction band edge, leading to a higher D_it than 900°C close to the conduction band edge. Furthermore, the Ga_xCe_yO_z PL at 700°C has acquired the worst interface quality in terms of the highest D_it near the conduction band edge due to the acquisition of a higher concentration of V_o and unbonded nitrogen, as postulated earlier. Furthermore, although the Ga_xCe_yO_z PL at 700°C was composed of a higher concentration of the Ga³⁺–V_o defect pair, the possibility of the Ga³⁺–V_o defect pair reducing D_it close to the conduction band edge was ruled out. This could be an indication that the Ga³⁺–V_o defect pair could have occupied deep levels within the bandgap. Nonetheless, farther away from the conduction band edge, the Ga_xCe_yO_z PLs annealed at 700, 800, and 900°C have acquired a different trend from the reduced D_it, of which the Ga_xCe_yO_z PL at 900°Cwas shown to have the highest D_it, followed by 800 and 700°C. This observation suggested that away from the conduction band edge, traps that were residing below the intrinsic level or in between the fermi level and the intrinsic level could be composed of a higher concentration of deep traps that could respond randomly to the applied biasing conditions [67]. Consequently, it could be noted that the Ga³⁺–V_o defect cluster would most likely induce states farther away from the conduction band edge to act as deep traps. In addition, the observed contradictory trend in D_it values farther away from the conduction band edge could also possibly originate from the presence of different types of traps. Hence, a further analysis was required to clarify the presence of traps within the Ga_xCe_yO_z PL.

Additional information regarding the interface traps could be identified by employing high–low-frequency capacitance–voltage (C–V) and conductance techniques, whereby the interface state density (N_ss) could be approximated by considering the frequency dispersion of conductance-voltage (G–V) and C–V characteristics recorded over a frequency spectrum ranging from 1 MHz to 10 KHz. The measured G–V and C–V curves were duly corrected, taking into consideration the series resistance (R_s) in order to eradicate the undesirable parasitic effects, thereby ensuring that the estimation of interface states could be rendered with precision [68]. The typically corrected C–V and G–V curves measured at different frequencies for the Ga_xCe_yO_z PL annealed at 900°C are presented in Figures 16 and 17, respectively. The subsequent equation was utilized to ascertain the Rs for the Ga_xCe_yO_z PLs that underwent postdeposition annealing at various temperatures in an N₂–O₂–N₂ ambient [69]:

(9)

where ω is the angular frequency while G_ma and C_ma represent the measured conductance and capacitance values, respectively, in the strong accumulation region. The correction of the experimental G–V and C–V curves at different frequencies was carried out as per the determined R_s value (not shown) using the following equation [70]:

(10)

(11)

(12)

where C_c, G_c, G_m, and C_m denote corrected capacitance, corrected conductance, measured conductance, and measured capacitance, respectively. The high–low-frequency C–V method was also employed to determine the N_ss for the investigated Ga_xCe_yO_z PLs, as expressed by the following equation [71]:

(13)

where C_cLF is the lowest corrected capacitance value at a low frequency of 10 KHz while C_cHF is the corrected capacitance value at a high frequency of 1 MHz that corresponded to C_cLF. The calculated N_ss values derived from the high–low-frequency C–V method as a function of V_g for the investigated Ga_xCe_yO_z PLs are presented in Figure 18. It was noticed that all of the Ga_xCe_yO_z PLs attained a comparable N_ss during the application of negative bias. This observation was in line with the observed Q_eff value wherein the acquisition of negative charges within the PLs could have occupied a deep level during the negative bias, contributing to the occurrence of charge trapping or detrapping at around the same rate for all of the investigated Ga_xCe_yO_z samples, and hence a comparable N_ss value was observed. However, as the bias was shifted to positive, a significant dispersion in the N_ss value was observed, suggesting that the response of traps against the bias could be significant during positive bias. This observation was consistent with the reported results that for a 4H-SiC-based MOS capacitor, in the accumulation region, all the traps could be filled with the majority carriers (electrons in this work) and responded quickly against the voltage bias [71]. Moreover, it was noticed that the Ga_xCe_yO_z PL annealed at 900°C attained the best interface quality in terms of a lower N_ss value during the application of positive bias. This observation suggested that the passivation of Vo by the incoming oxygen ions, together with the passivation of Si and/or C dangling bonds by the nitrogen ions, could improve the interface quality as compared to other samples. Moreover, it has been noted that the PL of Ga_xCe_yO_z, which was annealed at a temperature of 600°C, has achieved the highest N_ss–V_g peak position at ~4.3 V. This indicated that the interface traps were positioned farther from the conduction band compared to the PL of Ga_xCe_yO_z annealed at 700°C (~1.84 V) and 800°C (~1.52 V). Nevertheless, the N_ss–V_g peak for the Ga_xCe_yO_z PL, which was subjected to annealing at 900°C, proved to be unattainable, thereby indicating the probable existence of border traps that are positioned in closest proximity to the conduction band. Consequently, it has been deduced that the elevation in the temperature of postdeposition annealing, which ranges from 600 to 800°C, has indeed contributed to the establishment of border traps that are situated farther from the conduction band. Furthermore, an observable degradation in the overall quality of the interface was noted for the Ga_xCe_yO_z PL when the temperature of annealing was increased from 600 to 700°C, which serves to further validate the hypothesis that this particular PL contains elevated concentrations of V_o, as well as unbonded nitrogen ions, both of which are likely to contribute to the formation of border traps that lead to a further degradation in the quality of the interface. Furthermore, it has been established that the Ga_xCe_yO_z PL specimen, which underwent annealing at 800°C, has attained the highest N_ss value, thereby providing compelling evidence that a significantly greater concentration of nitrogen ions has been assimilated into this particular sample, and in this context, the nitrogen ions that have been incorporated are expected to function as border traps within the PL. The passivation of V_o by incoming oxygen ions in conjunction with the reoxidation of Ce³⁺ to Ce⁴⁺, as well as the passivation of Si and/C dangling bonds by the nitrogen ions at 900°C, which has led to the attainment of the best interface quality in terms of the lowest N_ss value.

Further, the N_ss values calculated using the Hill–Coleman approach for the investigated Ga_xCe_yO_z PL could be represented by the following equation [72]:

(14)

where

is the peak value corresponding to the corrected G_c/ω–V curve, and C_c is the corrected capacitance corresponding to the

. Figure 19 presents the calculated N_ss values with respect to different frequencies ranging from 10 kHz to 1 MHz for the Ga_xCe_yO_z PLs subjected to postdeposition annealing at different temperatures in N₂–O₂–N₂ ambient. It was observed from Figure 19 that the highest N_ss value was observed for the Ga_xCe_yO_z PL annealed at 600°C, suggesting that this PL was composed of a higher concentration of defects, which had earlier led to the attainment of poor C–V and J–E characteristics. Furthermore, an enhancement in the quality of the interface, evidenced by a reduction in the N_ss value, was noted as the annealing temperature was elevated to 700°C and beyond. Consequently, it was noted that the Ga_xCe_yO_z PL annealed at 900°C has attained the lowest N_ss value, which was consistent with the high–low-frequency method. This observation further supported the hypothesis that the stimulated passivation of V_o by the impinging oxygen ions, together with the passivation of Si and/or C dangling bonds at this temperature, have contributed to the better interface between Ga_xCe_yO_z and the 4H-SiC substrate. Moreover, it could be noticed that at lower frequency ranges, a sudden increment in the N_ss value was observed for the Ga_xCe_yO_z PL annealed at 700, 800, and 900°C, which made it obvious that at lower frequencies, interface states having a low time constant could follow the applied AC signal easily as compared to the high-frequency region, and hence a higher N_ss value was observed at the low-frequency range. However, a sudden decrement in the N_ss value was observed for the Ga_xCe_yO_z PL annealed at 600°C. The reason for this observation has yet to be identified. Moreover, it was worth mentioning that in this work, the observation of higher concentrations of STD and Q_eff observed for the Ga_xCe_yO_z PL at 900°C has not contributed to the deterioration of interface quality, where reasonably low D_it and N_ss were attained at this temperature, translating to good MOS characteristics.

4. Conclusion

The formation of Ga_xCe_yO_z PL on 4H-SiC substrate following postdeposition annealing at various temperatures of 600, 700, 800, and 900°C in an ambient of N₂–O₂–N₂ was presented. The successful doping of Ga³⁺ cation into the CeO₂ crystal lattice to form the ternary Ga_xCe_yO_z PL has been confirmed by GIXRD, UV–VIS–NIR, as well as XPS measurements. It was found that nitrogen ions from the annealing ambient would plausibly attach to the V_o, generating additional V_o and/or diffused to the interface to passivate Si and/or C dangling bonds. It has been noted that at lower temperatures of 600 and 700°C, nitrogen ions primarily resided in the region of the Ga_xCe_yO_z PL to attach with the V_o. However, at higher temperatures of 800 and 900°C, the likelihood of nitrogen ions acquiring sufficient energy to diffuse to the Ga_xCe_yO_z/4H-SiC interface and formed attachments with Si and/or C dangling bonds increased. Consequently, the formation of the SiO₂ IL was minimized at higher temperatures. Due to the increased doping of oxygen ions at higher temperatures of 800 and 900°C, the passivation of V_o was enhanced at these temperatures. Therefore, a superior J–E was observed at these temperatures, with an E_B of 2.95 and 5.58 Mv/cm observed for the Ga_xCe_yO_z PL annealed at 800 and 900°C, respectively. Additionally, the higher E^D and E^ID observed at higher temperatures of 800 and 900°C further confirmed that these PLs were composed of lower concentrations of V_o. XPS analysis confirmed that the Ce³⁺ state, in conjunction with the V_o, was minimal at the higher temperatures, with reoxidation of Ce³⁺ to Ce⁴⁺ being observed as the annealing temperature increased from 800 to 900°C. These observations were made in conjunction with the obtained k values of 24.11 and 24.01 for the Ga_xCe_yO_z PL at 800 and 900°C, respectively, with a minimal reduction in the k value at 900°C attributed to the slight increase in SiO₂ thickness. Nevertheless, this study demonstrated that the impact of SiO₂ thickness on the reduction of the k value was minimal. A further analysis of STD, Q_eff, D_it, and N_ss suggested that the Ga_xCe_yO_z PLs annealed at 800 and 900°C outperformed other samples in terms of performance, with the Ga_xCe_yO_z PL annealed at 900°C exhibiting optimum performance.

Conflicts of Interest

The authors declare no conflicts of interest.

Funding

The authors wish to express their gratitude for the financial assistance by the Ministry of Higher Education Malaysia through the Fundamental Research Grant Scheme (FRGS), referenced by Project Code: FRGS/1/2023/STG05/USM/02/8.

Acknowledgments

Open Research

Data Availability Statement

The data used to support the findings of this study are available from the corresponding author upon request.

References

1 Singh S., Chaudhary T., and Khanna G., Recent Advancements in Wide Band Semiconductors (SiC and GaN) Technology for Future Devices, Silicon. (2022) 14, 5793–5800.
10.1007/s12633-021-01362-3
CAS Google Scholar
2 Wang Z., Zhang Z., shao C., Robertson J., Liu S., and Guo Y., Tuning the High-κ Oxide (HfO₂, ZrO₂)/4H-SiC Interface Properties With a SiO₂ Interlayer for Power Device Applications, Applied Surface Science. (2020) 527, 146843.
10.1016/j.apsusc.2020.146843
CAS Google Scholar
3 Ghandi R., Chen C., and Sandvik P., Silicon Carbide Integrated Circuits With Stable Operation Over a Wide Temperature Range, IEEE Electron Device Lett. (2014) 35, 1206–10208.
10.1109/LED.2014.2362815
CAS Google Scholar
4 Willander M., Friesel M., Wahab Q., and Straumal B., High-Temperature Electronic Materials: Silicon Carbide and Diamond, Springer Handbook of Electronic and Photonic Materials. (2006) 1, 537–563.
10.1007/978-0-387-29185-7_24
Google Scholar
5 Zetterling C. M., Integrated Circuits in Silicon Carbide for High-Temperature Applications, Mrs Bulletin. (2015) 40, 431–438.
10.1557/mrs.2015.90
CAS Web of Science® Google Scholar
6 She X., Huang A. Q., Lucia O., and Ozpineci B., Review of Silicon Carbide Power Devices and Their Applications, IEEE Trans Ind Electron. (2017) 64, 8193–8205.
10.1109/TIE.2017.2652401
Web of Science® Google Scholar
7 Baliga B. J., M. Rudan, R. Brunetti, and S. Reggiani, Silicon Carbide Power Devices, Springer Handbook of Semiconductor Devices, 2023, no. 2023, Springer, Cham, 491–523.
10.1007/978-3-030-79827-7_14
Google Scholar
8 Kimoto T. and Cooper J. A., Fundamentals of Silicon Carbide Technology: Growth, Characterization, Devices, and Applications, 2014, John Wiley & Sons, 422–454.
10.1002/9781118313534
Google Scholar
9 Harris C. I. and Afanas V. V., SiO₂ as an Insulator for SiC Devices, Microelectronic Engineering. (1997) 36, 167–174.
10.1016/S0167-9317(97)00041-5
CAS Web of Science® Google Scholar
10 Dimitrijev S., Harrison H. B., Tanner P., Cheong K. Y., and Han J., Z. C. Feng, Oxidation, MOS Capacitors, and MOSFETs, SiC Power Materials, 2004, 73, Springer, Berlin, Heidelberg, 345–373.
10.1007/978-3-662-09877-6_9
Google Scholar
11 Usman M., Henkel C., and Hallén A., HfO₂/Al₂O₃ Bilayered High-k Dielectric for Passivation and Gate Insulator in 4H-SiC Devices, ECS Journal of Solid State Science and Technology. (2013) 2, no. 8, N3087.
10.1149/2.013308jss
CAS Google Scholar
12 Song J., Ohta A., Hoshii T., Wakabayashi H., Tsutsui K., and Kakushima K., High Field-Effect Mobility With Suppressed Negative Threshold Voltage Shift in 4H-SiC MOSFET With Cerium Oxide Interfacial Layer, Japanese Journal of Applied Physics. (2021) 60, no. 3, 030901.
10.35848/1347-4065/abdf7c
CAS Google Scholar
13 Khosa R. Y. and Hassan J., Electrical Characterization of Amorphous Al₂O₃ Dielectric Films on n-Type 4H-SiC, AIP Advances. (2018) 8, 025304.
10.1063/1.5021411
Web of Science® Google Scholar
14 Król K. and Szmidt J., Influence of Atomic Layer Deposition Temperature on the Electrical Properties of Al/ZrO₂/SiO₂/4H-SiC Metal-Oxide Semiconductor Structures, Physica Status Solidi (A). (2018) 215, 1700882.
10.1002/pssa.201700882
Web of Science® Google Scholar
15 Moon J. H., Eom D. I., Song H. K., and Kim H. J., Electrical Properties of the La₂O₃/4H-SiC Interface Prepared by Atomic Layer Deposition Using La (iPrCp)₃ and H₂O, Materials Science Forum. (2006) 527-529, 1083–1086.
10.4028/www.scientific.net/MSF.527-529.1083
CAS Google Scholar
16 Abdul Shekkeer K. M., Cheong K. Y., and Quah H. J., Surface Passivation of Silicon Substrate by Ternary Ga_xCe_yO_z Layers Grown via Combination of Forming Gas and Oxygen at Different Temperatures, Ceramics International. (2024) 50, 25528–25540.
10.1016/j.ceramint.2024.04.287
Google Scholar
17 Shekkeer K. M. Abdul, Cheong K. Y., and Quah H. J., Effects of Postdeposition Annealing of Cerium Oxide Passivation Layer in Nitrogen-Oxygen-Nitrogen Ambient, International Journal of Energy Research. (2022) 46, 14814–14826.
10.1002/er.8184
Google Scholar
18 Tan K. Y., Hedei P. H. M. A., and Zabidi A. R. M., et al.Comparative Studies of Metal-Organic Decomposed Ga_xCe_yO_z and CeO₂ Based Functional MOS Capacitor, International Journal of Energy Research. (2021) 45, 18257–18261.
10.1002/er.6952
CAS Web of Science® Google Scholar
19 Yu T., Lim B., and Xia Y., Aqueous-Phase Synthesis of Single-Crystal Ceria Nanosheets, Angewandte Chemie. (2010) 122, 4586–4589.
10.1002/ange.201001521
Google Scholar
20 Lim W. F., Cheong K. Y., and Lockman Z., Physical and Electrical Characteristics of Metal-Organic Decomposed CeO₂ Gate Spin-Coated on 4H-SiC, Applied Physics A. (2011) 103, 1067–1075.
10.1007/s00339-010-6039-8
CAS Google Scholar
21 Tye L., El-Masry N. A., Chikyow T., McLarty P., and Bedair S. M., Electrical Characteristics of Epitaxial CeO₂ on Si (111), Applied Physics Letters. (1994) 65, 3081–3083.
10.1063/1.112467
CAS Web of Science® Google Scholar
22 Fiorenza P., Greco G., Fisichella G., Roccaforte F., Malandrino G., and Nigro R. L., High Permittivity Cerium Oxide Thin Films on AlGaN/GaN Heterostructures, Applied Physics Letters. (2013) 103, 112905.
10.1063/1.4820795
CAS Web of Science® Google Scholar
23 Dutta P., Pal S., Seehra M. S., Shi Y., Eyring E. M., and Ernst R. D., Concentration of Ce³⁺ and Oxygen Vacancies in Cerium Oxide Nanoparticles, Chemistry of Materials. (2006) 18, 5144–5146.
10.1021/cm061580n
CAS Google Scholar
24 Abdul Shekkeer K. M., Cheong K. Y., and Quah H. J., Growth of Quaternary Ga_xCe_1-xO_yN_z Passivation Layer for Silicon Based Metal-Oxide-Semiconductor Capacitor, Materials Chemistry and Physics. (2022) 290, 126549.
10.1016/j.matchemphys.2022.126549
CAS Google Scholar
25 Quah H. J., Lim W. F., Cheong K. Y., Hassan Z., and Lockman Z., Comparison of Metal-Organic Decomposed (MOD) Cerium Oxide (CeO₂) Gate Deposited on GaN and SiC Substrates, Journal of Crystal Growth. (2011) 326, 2–8.
10.1016/j.jcrysgro.2011.01.040
CAS Google Scholar
26 Nallabala N. K. R., Structural, Optical and Photoresponse Characteristics of Metal-Insulator-Semiconductor (MIS) Type Au/Ni/CeO₂/GaN Schottky Barrier Ultraviolet Photodetector, Materials Science in Semiconductor Processing. (2020) 117, 105190.
10.1016/j.mssp.2020.105190
CAS Web of Science® Google Scholar
27 Khera E. A. and Sungjun K., Investigation of Structural and Electronic Properties of Doped Ceria Ce_1-xM_xO₂ (M = Hf, Ti, Ba, Mg, Nb, V_x = 0.25%) for ReRAM Applications: A First Principles Study, Physica E Low Dimens Syst Nanostruct. (2020) 119, 114025.
10.1016/j.physe.2020.114025
CAS Google Scholar
28 Zafar M. and Siddiqi S. A., Structural, Dielectric and Optical Investigations of Zr Incorporated Ceria Nanoparticles, Materials Research Express. (2019) 6, 116321.
10.1088/2053-1591/ab4f28
Google Scholar
29 Abdul Shekkeer K. M., Deng J., Cheong K. Y., Riyas K. M., and Quah H. J., Alteration in Growth Temperatures of Metal-Organic Decomposed Ga_xCe_1-xO_yN_z Passivation Layer in Nitrogen/Oxygen/Nitrogen Ambient, Ceramics International. (2023) 49, 14760–14770.
10.1016/j.ceramint.2023.01.072
CAS Google Scholar
30 Li J. G., Wang Y., Ikegami T., and Ishigaki T., Densification Below 1000°C and Grain Growth Behaviors of Yttria Doped Ceria Ceramics, Solid State Ion. (2008) 179, 951–954.
10.1016/j.ssi.2008.01.053
CAS Web of Science® Google Scholar
31 Lim W. F. and Cheong K. Y., Oxygen Vacancy Formation and Annihilation in Lanthanum Cerium Oxide as a Metal Reactive Oxide on 4H-Silicon Carbide, Physical Chemistry Chemical Physics. (2014) 16, no. 15, 7015–7018, https://doi.org/10.1039/c3cp55214d, 2-s2.0-84897854164.
10.1039/c3cp55214d
CAS PubMed Web of Science® Google Scholar
32 Bandyopadhyay A., Sarkar B. J., Sutradhar S., Mandal J., and Chakrabarti P. K., Synthesis, Structural Characterization, and Studies of Magnetic and Dielectric Properties of Gd³⁺ Doped Cerium Oxide (Ce_0.90Gd_0.10O_2−δ), Journal of Alloys and Compounds. (2021) 865, 158838.
10.1016/j.jallcom.2021.158838
CAS Google Scholar
33 Kumar P., Structural, Morphological, Electrical and Dielectric Properties of Mn Doped CeO₂, Journal of Alloys and Compounds. (2016) 672, 543–548.
10.1016/j.jallcom.2016.02.153
CAS Web of Science® Google Scholar
34 Henderson M. A., Perkins C. L., Engelhard M. H., Thevuthasan S., and Peden C. H. F., Redox Properties of Water on the Oxidized and Reduced Surfaces of CeO₂, Surface Science. (2003) 526, 1–18.
10.1016/S0039-6028(02)02657-2
CAS Web of Science® Google Scholar
35 Avila-Paredes H. J., Shvareva T., Chen W., Navrotsky A., and Kim S., A Correlation Between the Ionic Conductivities and the Formation Enthalpies of Trivalent-Doped Ceria at Relatively Low Temperatures, Physical Chemistry Chemical Physics. (2009) 11, no. 38, 8580–8585, https://doi.org/10.1039/b821982f, 2-s2.0-70349467548.
10.1039/b821982f
CAS PubMed Web of Science® Google Scholar
36 Keating P. R. L., Scanlon D. O., and Watson G. W., Computational Testing of Trivalent Dopants in CeO₂ for Improved High-κ Dielectric Behaviour, Journal of Materials Chemistry C. (2013) 1, 1093–1098.
10.1039/C2TC00385F
CAS Web of Science® Google Scholar
37 Randall C. A., Improved Reliability Predictions in High Permittivity Dielectric Oxide Capacitors Under High dc Electric Fields With Oxygen Vacancy Induced Electromigration, Journal of Applied Physics. (2013) 113, 014101.
10.1063/1.4772599
CAS Google Scholar
38 Anirban S. K. and Dutta A., Revisiting Ionic Conductivity of Rare Earth Doped Ceria: Dependency on Different Factors, International Journal of Hydrogen Energy. (2020) 45, 25139–25166.
10.1016/j.ijhydene.2020.06.119
CAS Google Scholar
39 Pei X., Structural and Photoluminescence Properties of SnO₂: Ga Films Deposited on α-Al₂O₃, 0001 by MOCVD, Journal of Luminescence. (2010) 130, 1189–1193.
10.1016/j.jlumin.2010.02.019
CAS Web of Science® Google Scholar
40 Abdul Shekkeer K. M., Cheong K. Y., and Quah H. J., Growth of Gallium Cerium Oxide Passivation Layer on 4H-Silicon Carbide Substrate and Its Metal-Oxide-Semiconductor Characteristics, Ceramics International. (2024) 50, 1298–1302.
10.1016/j.ceramint.2023.10.148
Google Scholar
41 Bersuker G., Byoung H. L., and Howard R. H., Novel Dielectric Materials for Future Transistor Generations, International Journal of High Speed Electronics and Systems. (2006) 16, 221–239.
10.1142/S012915640600362X
CAS Google Scholar
42 Puente-Martínez D. E. and Padmasree K. P., Improving the Electrical Properties of Er-Doped CeO₂: Effect of Sintering Aids CaO, MgO, and TiO₂ on Conductivity, Journal of the Korean Ceramic Society. (2023) 60, 817–829.
10.1007/s43207-023-00306-4
CAS Web of Science® Google Scholar
43 Wang S., Dhar S., and Wang S.-R., et al.Bonding at the SiC-SiO₂ Interface and the Effects of Nitrogen and Hydrogen, Physical Review Letters. (2007) 98, no. 2, https://doi.org/10.1103/PhysRevLett.98.026101, 2-s2.0-33846345840, 026101.
10.1103/PhysRevLett.98.026101
CAS PubMed Google Scholar
44 Wang B., Huang W., Chi L., Al-Hashimi M., Marks T. J., and Facchetti A., High-k Gate Dielectrics for Emerging Flexible and Stretchable Electronics, Chemical Reviews. (2018) 118, no. 11, 5690–5754, https://doi.org/10.1021/acs.chemrev.8b00045, 2-s2.0-85048685062.
10.1021/acs.chemrev.8b00045
CAS PubMed Google Scholar
45 Isik M., Delice S., and Gasanly N. M., Temperature Dependence of Band Gap of CeO₂ Nanoparticle Photocatalysts, Physica E: Low-dimensional Systems and Nanostructures. (2023) 150, 115712.
10.1016/j.physe.2023.115712
CAS Web of Science® Google Scholar
46 Kayani Z. N., Chaudhry W., Sagheer R., Riaz S., and Naseem S., Effect of Ce Doping on Crystallite Size, Band Gap, Dielectric and Antibacterial Properties of Photocatalyst Copper Oxide Nano-Structured Thin Films, Materials Science and Engineering: B. (2022) 283, 115799.
10.1016/j.mseb.2022.115799
Google Scholar
47 Muduli S., Behera S. S., Mohapatra R. K., Parhi P. K., and Sahoo T. R., Efficient Adsorption and Antimicrobial Application of Bio-Synthesized Porous CeO₂ Nanoparticles, Materials Science and Engineering: B. (2023) 290, 116275.
10.1016/j.mseb.2023.116275
CAS Google Scholar
48 Choi J. S. and Park J. G., Interface Characterization of Nitrogen Plasmatreated Gate Oxide Film Formed by RTP Technology, Surface and Interface Analysis. (2014) 28, 303–306.
10.1002/sia.5633
Google Scholar
49 Luna-Sánchez R. M. and González-Martínez I., Extensive Studies for Effects of Nitrogen Incorporation into Hf-Based High-k Gate Dielectrics, ECS Transactions. (2006) 2, 63–78.
10.1149/1.2193875
Google Scholar
50 Song X., Xu J., Liu L., and Lai P. T., Comprehensive Investigation on CF₄/O₂-Plasma Treating the Interfaces of Stacked Gate Dielectric in MoS₂ Transistors, Applied Surface Science. (2021) 542, 148437.
10.1016/j.apsusc.2020.148437
CAS Web of Science® Google Scholar
51 Phokha S. and Maensiri S., Effect of Annealing Temperature on the Structural and Magnetic Properties of CeO₂ Thin Films, Thin Solid Films. (2020) 704, 138001.
10.1016/j.tsf.2020.138001
CAS Google Scholar
52 Anandan C. and Bera P., XPS Studies on the Interaction of CeO₂ With Silicon in Magnetron Sputtered CeO₂ Thin Films on Si and Si₃N₄ Substrates, Applied Surface Science. (2013) 283, 297–303.
10.1016/j.apsusc.2013.06.104
CAS Web of Science® Google Scholar
53 Kumar P. N., Mishra S. K., and Kannan S., Structural Perceptions and Mechanical Evaluation of β-Ca₃(PO₄)₂/c -CeO₂ Composites With Preferential Occupancy of Ce³⁺ and Ce⁴⁺, Inorganic Chemistry. (2017) 56, 3600–3611.
10.1021/acs.inorgchem.7b00045
PubMed Web of Science® Google Scholar
54 Wang L. and Gao Q., Enhanced Electrical Performance and Low Frequency Noise of In₂O₃ Thin-Film Transistors Using Al₂O₃/CeGdO_x Bilayer Gate Dielectrics, IEEE Transactions on Electron Devices. (2022) 69, 3169–3174.
10.1109/TED.2022.3164632
CAS Web of Science® Google Scholar
55 Pagliuca F., Luches P., and Valeri S., Interfacial Interaction Between Cerium Oxide and Silicon Surfaces, Surface Science. (2013) 607, 164–169.
10.1016/j.susc.2012.09.002
CAS Web of Science® Google Scholar
56 Grosvenor A. P., Kobe B. A., and McIntyre N. S., Studies of the Oxidation of Iron by Water Vapour Using X-Ray Photoelectron Spectroscopy and QUASES, Surface Science. (2004) 572, 217–227.
10.1016/j.susc.2004.08.035
CAS Google Scholar
57 Pham A. T. T. and Tran V. T., Hydrogen Enhancing Ga Doping Efficiency and Electron Mobility in High-Performance Transparent Conducting Ga-Doped ZnO Films, Journal of Alloys and Compounds. (2021) 860, 158518.
10.1016/j.jallcom.2020.158518
CAS Web of Science® Google Scholar
58 Wolter S. D., Luther B. P., Waltemyer D. L., Önneby C., Mohney S. E., and Molnar R. J., X-Ray Photoelectron Spectroscopy and X-Ray Diffraction Study of the Thermal Oxide on Gallium Nitride, Applied Physics Letters. (1997) 70, 2156–2158.
10.1063/1.118944
CAS Google Scholar
59 Liu H., Xu C., Pan X., and Ye Z., The Photoluminescence Properties of β-Ga₂O₃ Thin Films, Journal of Electronic Materials. (2020) 49, 4544–4549.
10.1007/s11664-020-08134-6
CAS Web of Science® Google Scholar
60 Vanithakumari S. C. and Nanda K. K., Synthesis of One-Dimensional N-Doped Ga₂O₃ Nanostructures: Different Morphologies and Different Mechanisms, Bulletin of Materials Science. (2011) 34, 1331–1338.
10.1007/s12034-011-0324-9
CAS Google Scholar
61 Jia Y., Li H., Hu N., and Wang Q., Enhanced Visible Light Adsorption of Heavily Nitrogen Doped CeO₂ Thin Film via Ion Beam Assisted Deposition, Rare Metal Materials and Engineering. (2016) 45, 1988–1991.
10.1016/S1875-5372(16)30159-X
CAS Google Scholar
62 Dinescu M., Verardi P., Boulmer-Leborgne C., Gerardi C., Mirenghi L., and Sandu V., GaN Thin Films Deposition by Laser Ablation of Liquid Ga Target in Nitrogen Reactive Atmosphere, Applied Surface Science. (1998) 127, 559–563.
10.1016/S0169-4332(97)00705-8
Google Scholar
63 Foo C., Characterisation of Oxygen Defects and Nitrogen Impurities in TiO₂ Photocatalysts Using Variable-Temperature X-Ray Powder Diffraction, Nature Communications. (2021) 12, no. 1, 661–675, https://doi.org/10.1038/s41467-021-20977-z.
10.1038/s41467-021-20977-z
CAS PubMed Google Scholar
64 Deng J. and Quah H. J., Structural, Morphological, and Metal-Oxide-Semiconductor Characteristics of Thulium Oxide Passivation Layer Grown in Nitrogen-Oxygen-Nitrogen Ambient, Sustainable Materials and Technologies. (2023) 35, e00534.
10.1016/j.susmat.2022.e00534
CAS Google Scholar
65 Lim W. F., Hassan Z., and Quah H. J., Dual-Step Grown Ternary Aluminium Zirconium Oxide and Its Characteristics for Metal-Oxide-Semiconductor Capacitor, Ceramics International. (2020) 46, 10416–10424.
10.1016/j.ceramint.2020.01.040
CAS Web of Science® Google Scholar
66 Zhang Q., Low Interface Trapped Charge Density for AlO/β-GaO (001) Metal-Insulator-Semiconductor Capacitor, IEEE Journal of the Electron Devices Society. (2022) 10, 942–946.
10.1109/JEDS.2022.3214000
CAS Web of Science® Google Scholar
67 Lelis A. J., Green R., Habersat D. B., and El M., Basic Mechanisms of Threshold-Voltage Instability and Implications for Reliability Testing of SiC MOSFETs, IEEE Transactions on Electron Devices. (2015) 62, 316–323.
10.1109/TED.2014.2356172
CAS Google Scholar
68 Singh V., Shashank N., Sharma S. K., Shekhawat R. S., Kumar D., and Nahar R. K., Frequency Dependence Studies on the Interface Trap Density and Series Resistance of HfO₂ Gate Dielectric Deposited on Si Substrate: Before and after 50MeV Li³⁺ Ions Irradiation, Nuclear Instruments and Methods in Physics Research Section B: Beam Interactions With Materials and Atoms. (2011) 269, 2765–2770.
10.1016/j.nimb.2011.08.025
CAS Google Scholar
69 Kaymaz A., Tecimer H. U., Baydilli E. E., and Altındal Ş., Investigation of Gamma-Irradiation Effects on Electrical Characteristics of Al/(ZnO-PVA)/p-Si Schottky Diodes Using Capacitance and Conductance Measurements, Journal of Materials Science: Materials in Electronics. (2020) 31, 8349–8358.
10.1007/s10854-020-03370-2
CAS Web of Science® Google Scholar
70 Gullu H. H., Yildiz D. E., Kocyigit A., and Yıldırım M., Electrical Properties of Al/PCBM:ZnO/p-Si Heterojunction for Photodiode Application, Journal of Alloys and Compounds. (2020) 827, 154279.
10.1016/j.jallcom.2020.154279
CAS Web of Science® Google Scholar
71 Friedrichs P., Burte E. P., and Schörner R., Interface Properties of Metal-Oxide-Semiconductor Structures on n-Type 6H and 4H-SiC, Journal of Applied Physics. (1996) 79, 7814–7819.
10.1063/1.362389
CAS Web of Science® Google Scholar
72 Korucu D., Turut A., Turan R., and Altindal Ş., Origin of Forward Bias Capacitance Peak and Intersection Behavior of C and G/w of Ag/p-InP Schottky Barrier Diodes, Materials Science in Semiconductor Processing. (2013) 16, 344–351.
10.1016/j.mssp.2012.09.015
CAS Google Scholar

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Controlled Growth Temperatures of High Dielectric Constant Gallium Cerium Oxide Layer on 4H-Silicon Carbide Substrate

Abstract

1. Introduction

2. Experimental

3. Results and Discussion

4. Conclusion

Conflicts of Interest

Funding

Acknowledgments

Open Research

Data Availability Statement

References

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Controlled Growth Temperatures of High Dielectric Constant Gallium Cerium Oxide Layer on 4H-Silicon Carbide Substrate

Abstract

1. Introduction

2. Experimental

3. Results and Discussion

4. Conclusion

Conflicts of Interest

Funding

Acknowledgments

Open Research

Data Availability Statement

References

Figures

References

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