Micro-tip array fabrication by selective anodization of p⁺-type Si substrate

Crystal Si micro-tip arrays were fabricated by selective anodization of p⁺-type Si substrate using an n-type doped layer as mask. The use of p⁺-type substrate gave rise to sideway anodization with a moderate degree of current restriction patterning effect under the n-type mask layer, and triggered the formation of a sharp tip on the Si substrate. A process that allows for the fabrication of tip arrays with a self-aligned gate electrode was also studied. In the latter process, anodization through a donut-shape window within the n-type doped area prompted the formation of a tip with surrounding Si wall with the top n-type layer as a gate.