Dram Chips
Yoichi Oshima,
Bing J. Sheu,
Steve H. Jen,
Yoichi Oshima
Japanese Patent Office, 3-4-3 Kasumigaseki Chiyoda-ku, Tokyo, Japan, 100
Search for more papers by this authorBing J. Sheu
University of Southern California, Los Angeles, CA, 90089
Search for more papers by this authorSteve H. Jen
University of Southern California, Los Angeles, CA, 90089
Search for more papers by this authorYoichi Oshima,
Bing J. Sheu,
Steve H. Jen,
Yoichi Oshima
Japanese Patent Office, 3-4-3 Kasumigaseki Chiyoda-ku, Tokyo, Japan, 100
Search for more papers by this authorBing J. Sheu
University of Southern California, Los Angeles, CA, 90089
Search for more papers by this authorSteve H. Jen
University of Southern California, Los Angeles, CA, 90089
Search for more papers by this authorFirst published: 27 December 1999
Abstract
The sections in this article are
- 1 Dram Memory Cell
- 2 Basic Dram System
- 3 Low-Power Design Technology
- 4 High-Throughput Dram Technology
- 5 Acknowledgments
Bibliography
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Wiley Encyclopedia of Electrical and Electronics Engineering
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