Volume 7, Issue 3-4 209416 pp. 195-209
Article
Open Access

Impulse: Memory System Support for Scientific Applications

John B. Carter

Corresponding Author

John B. Carter

Department of Computer Science University of Utah Salt Lake City UT 84112, USA

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Wilson C. Hsieh

Wilson C. Hsieh

Department of Computer Science University of Utah Salt Lake City UT 84112, USA

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Leigh B. Stoller

Leigh B. Stoller

Department of Computer Science University of Utah Salt Lake City UT 84112, USA

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Mark Swanson

Mark Swanson

Intel Corporation Dupont WA 98327, USA , intel.com

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Lixin Zhang

Lixin Zhang

Department of Computer Science University of Utah Salt Lake City UT 84112, USA

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Sally A. McKee

Sally A. McKee

Department of Computer Science University of Utah Salt Lake City UT 84112, USA

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First published: 01 January 1999
Citations: 9

Abstract

Impulse is a new memory system architecture that adds two important features to a traditional memory controller. First, Impulse supports application-specific optimizations through configurable physical address remapping. By remapping physical addresses, applications control how their data is accessed and cached, improving their cache and bus utilization. Second, Impulse supports prefetching at the memory controller, which can hide much of the latency of DRAM accesses. Because it requires no modification to processor, cache, or bus designs, Impulse can be adopted in conventional systems. In this paper we describe the design of the Impulse architecture, and show how an Impulse memory system can improve the performance of memory-bound scientific applications. For instance, Impulse decreases the running time of the NAS conjugate gradient benchmark by 67%. We expect that Impulse will also benefit regularly strided, memory-bound applications of commercial importance, such as database and multimedia programs.

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