Microwave and Optical Technology Letters

Volume 61, Issue 8 pp. 2020-2026

RESEARCH ARTICLE

A study comparing current and voltage combining techniques for CMOS power amplifiers for WLAN applications

Jonghoon Park,

Jonghoon Park

School of Electronic Engineering, College of Information Technology, Soongsil University, Seoul, Republic of Korea

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Changhyun Lee,

Changhyun Lee

School of Electronic Engineering, College of Information Technology, Soongsil University, Seoul, Republic of Korea

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Changkun Park,

Corresponding Author

Changkun Park

[email protected]

orcid.org/0000-0002-4699-9935

School of Electronic Engineering, College of Information Technology, Soongsil University, Seoul, Republic of Korea

Correspondence

Changkun Park, School of Electronic Engineering, College of Information Technology, Soongsil University, 369 Sangdo-ro, Dongjak-gu, Seoul, 06978, Republic of Korea.

Email: [email protected]

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Jonghoon Park,

Jonghoon Park

School of Electronic Engineering, College of Information Technology, Soongsil University, Seoul, Republic of Korea

Search for more papers by this author

Changhyun Lee,

Changhyun Lee

School of Electronic Engineering, College of Information Technology, Soongsil University, Seoul, Republic of Korea

Search for more papers by this author

Changkun Park,

Corresponding Author

Changkun Park

[email protected]

orcid.org/0000-0002-4699-9935

School of Electronic Engineering, College of Information Technology, Soongsil University, Seoul, Republic of Korea

Correspondence

Changkun Park, School of Electronic Engineering, College of Information Technology, Soongsil University, 369 Sangdo-ro, Dongjak-gu, Seoul, 06978, Republic of Korea.

Email: [email protected]

Search for more papers by this author

First published: 27 February 2019

https://doi.org/10.1002/mop.31847

Funding information: Ministry of Trade, industry & Energy (MI, Korea), Grant/Award Number: 10053023

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Abstract

This article presents CMOS power amplifiers for WLAN applications. These power amplifiers use current and voltage combining techniques for simultaneous improvement of the output power and efficiency, respectively, and are analyzed to determine which technique is more suitable for WLAN applications. The power amplifiers are fabricated with a 180 nm CMOS process. Their performance is verified using an 802.11 g modulated signal with 64 QAM, 20 MHz of bandwidth, and 54-Mbps at 2.7 GHz. The measurements of the current and voltage combining power amplifiers show about 21.9 and 21.8 dBm of average output power, respectively, at −25 dB error vector magnitude (EVM), and about 20.2 and 18 dBm of average output power, respectively, at −30 dB EVM for a commercial specification. In addition, the current combining PA is operated in a multi-mode manner, which saves the power stage current about 225 mA of the power stage current at low power mode. No pre-distortion technique is required and all components are integrated on the chip.

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Volume61, Issue8

August 2019

Pages 2020-2026

A study comparing current and voltage combining techniques for CMOS power amplifiers for WLAN applications

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A study comparing current and voltage combining techniques for CMOS power amplifiers for WLAN applications

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