This chapter shows the mainstream lithography technologies that have been used in the past and are expected to be used in the future, to print the critical layers of semiconductor chips. Economics in lithography is largely driven by the speed (wafer throughput) that can be reached by the lithography systems. Besides economics, also the important lithographic criteria, such as resolution and overlay, have to meet the requirements of the technology and have to be scalable to the next technology nodes. The ultimate resolution that can be achieved with optical lithography in a single exposure is about 40 nm. The rate of reduction in defect density is comparable to the reduction rate when 193 nm immersion lithography was being introduced several years ago. A number of lithography approaches that have not been used extensively in the manufacturing of integrated circuits are nanoimprint and e-beam maskless lithography.